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Re: [Xylo-SDR] Architecture review
3. We should not lock ourselves into a definition of the backplane
bus that is too specific. I like Lyle's suggestion that we have
something like user1, user2, etc... that can be user defined per
application or project. It will take some more thought...
Let's say there are 24 pins that are set aside for "user" signals. We
might make some of them - 8? - not go the whole backplane, but just from
this slot to the previous slot, 8 from this slot to the next slot, and 8
that go the length of the plane.
This allows daisy chaining boards and lets a board process a signal
before passing it on to the next board.
Below is an ASCII sketch of the idea (fixed width fonts-- on!) :
U0 U1----U0 U1---U0 U1... (the "chained" signals)
U2---------U2--------U2... (the "bussed" signals)