File | Description |
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a_nco.v | A MegaCore® function variation file, which defines a Verilog HDL top-level description of the custom MegaCore function. Instantiate the entity defined by this file inside of your design. Include this file when compiling your design in the Quartus II software. |
a_nco_bb.v | Verilog HDL black-box file for the MegaCore function variation. Use this file when using a third-party EDA tool to synthesize your design. |
a_nco.bsf | Quartus® II symbol file for the MegaCore function variation. You can use this file in the Quartus II block diagram editor. |
a_nco_st.v | Generated NCO synthesizable netlist. This file is required for Quartus II synthesis. It will be added to your Quartus II project |
a_nco.vo | Verilog HDL IP Functional Simulation model |
a_nco_tb.v | Verilog HDL Testbench |
a_nco_vo_msim.tcl | Modelsim TCL Script to run the Verilog HDL IP Functional Simulation model and generated Verilog HDL testbench in the Modelsim simulation software |
a_nco_wave.do | Modelsim Waveform File |
a_nco_model.m | Matlab m-file describing a Matlab bit-accurate model. |
a_nco_tb.m | Matlab Testbench |
a_nco.vec | Quartus Vector File. |
a_nco.html | The MegaCore function report file. |