HPSDRwiki - User contributions [en]

File:SDR Futures.pdf

2014-05-15T01:05:27Z

VK6APH:

HPSDRwiki talk:Community Portal

2014-05-15T01:00:05Z

VK6APH: /* SDR Architectures */ new section

== Table of Contents ==

I suggest disabling the table of contents on this page while it is only a table of contents itself. See http://en.wikipedia.org/wiki/Wikipedia:TOC for the method. [[User:VK2NRA|VK2NRA]] 19:11, 4 May 2009 (UTC)

:Done

== Links to user pages ==

Please delete the link to my user page sandbox. This is a bad idea as I may change my sandbox at any time without regard to links to it (that I don't know about). Link to the [[Verilog]] page instead. Note that I put in a temporary fix by redirecting my user page. Thanks, [[User:VK2NRA|Richard Ames, VK2NRA]] 05:27, 9 May 2009 (UTC)

:Done

== SDR Architectures ==

This is an article written by myself and Steve Ireland, VK6VZ, which discusses some current and future SDR architectures.

The article has been made available by the RSGB. If you upload the article to your own or another web site please include the following:

Copyright RSGB August/September 2013 - all rights reserved.

[[File:SDR_Futures.pdf]]

73 Phil...VK6PH May 2014

CYCLOPS

2012-11-29T07:04:11Z

VK6APH:

== An Alterative Cyclops Architecture ==

''' 29 Nov 2012 '''

The necessary software to undertake image removal had been developed and initial results are encouraging.
The LO has been replaced with a MAX2870 which will extend the frequency coverage to 6GHz.
PC code based on KISS Konsole has been developed and provides the usual spectrum analyser options and features.
Prototype hardware using off-the-shelf evaluation boards has been constructed.
FPGA code for the Metis board has been developed that enables the MAX2870 evaluation board to be connected to the Atlas bus.
Development and refinement of the PC code is ongoing.
It is expected that PCB design will start in early 2013.

''' 10 Jan 2012 '''

''' Feedback '''

Thanks to all those who provided feedback in relation to the proposed new architecture.

This technique has been used before:

QST October 2008 "Experimenters RF Spectrum Analyzer" George Steber, WB9LVI. George used both the LO image switching technique and moving the LO by Delta f in order to locate and remove images.

The Signal Hound Spectrum Analyzer (www.signalhound.com) uses this LO image switching technique with a fixed 10.7MHz IF to locate and remove images.

Feedback on the above designs indicated that they work well for narrow scans but are rather slow when scanning wide frequency ranges. Since Mercury will provide a 0-50MHz spectrum, and can also provide a bandwith of > 192kHz with suitable changes to the FPGA code, then we should be able to improve on these designs.

Since we can fine tune the required frequency using Mercury we can use the AD4351 in integer rather than fractional mode which will reduce the LO spurs.

''' 6 Jan 2012 '''

The description of the current Cyclops project follows very conventional lines i.e. input mixer, microwave LO, first IF above the highest LO frequency, second mixer with fixed second LO and second IF in the VHF range. Nothing very different here and the design follows many existing examples.
Whilst the prototypes performed adequately, a review of more current technologies indicates a possible alternative approach that has a number of advantages but also some disadvantages.
An alternative architecture is as shown in the block diagram below. This is a simple down converter that uses an IF in the 0 to 55MHz range (that will be fed to Mercury).

[[Image:CyclopsIII.JPG]]

By using a single chip VCO + PLL (e.g. ADF4351) we can build a spectrum analyser that will cover the range from 0Hz to 4.4GHz.
As you can see this is very simple from a hardware perspective. However, this simplification does come at a price – in the form of a total lack of image rejection.
For example, assume we want to display an input signal at 100MHz. We can arbitrarily select an IF frequency of say 10MHz which we tune Mercury to. In order that the signal spectrum is not reversed on the PC display we place the LO at 100 – 10 = 90MHz.
This will work just fine. But if there is also a signal at 90 - 10 = 80MHz (i.e. an image frequency) this will also be displayed and without some signal processing it will not be possible to determine if this signal is actually at 100MHz or 80MHz.
Since we are using Mercury as our IF receiver we have a vast array of possible LO and IF frequency combinations that could be used. So, if we now tune Mercury to say 20MHz and set our LO to 80MHz then our 100MHz signal will be displayed but the 80MHz image will not. Once again we could choose an IF of 30MHz, a LO of 70MHz and again the 80MHz image will not be displayed.
So, if we make a measurement with number of different IF + LO combinations and the FFT result is identical (perhaps not identical, but very similar due to the noise floor etc) we can be pretty sure that we are not being affected by any image signals. If only a few of the measurements are similar then we can choose one of these to display.
There are other techniques we can use to detect an image e.g. keep the IF fixed but move the LO to the image frequency. The FFT output would need to be reversed in this case before the spectrums are compared, but that is simple enough to do.
With this architecture the problem of detecting and eliminating images becomes one of software processing rather than filtering as in the case of a conventional spectrum analyser.
I investigated this architecture further using an AD4350 evaluation board connected to an ADE11X mixer, using Mercury as the IF plus PowerSDR as the display. This works very well and even without any image software processing makes a useful item of test equipment.
The ADF4351 uses a microwave VCO in the 3 to 4GHz range. To provide lower frequencies the VCO output is passed through (internal) dividers such that the output will cover the frequency range from 35 to 4400MHz. By using a divider the phase noise of the VCO is reduced such that over the 0-1GHz range the overall performance is superior to that of the prototype Cyclops board. The VCO is integral to the chip in which case the phase noise is not particularly good in comparison to say a YIG oscillator. However, when divided down it does make a most useful piece of test equipment.

In summary the advantages of the alternative architecture are:
* Wider frequency coverage 0 – 4.4GHz
* Much simpler and hence lower cost
* Improved phase noise performance
* No modifications to Mercury hardware required (Original Cyclops required the input filter to be bypassed in order to use as a 95MHz IF)

Disadvantages:
* More complex PC software required to detect images
* May not be possible to eliminate all images e.g. wide band or fast moving signals

A companion tracking generator could be built on the same board using a second ADF4351 and either a DDS chip or Penny(Lane) used as its reference. The combination could also be used as a Vector Network Analyser.
An alternative to the ADF4351 is the Hittite HMC830LP6GE which provides output in the range 25 – 3000MHz and appears to offer lower phase noise.

'''Next Step.''' Modify PowerSDR so that the bandscope data can be saved to a file on demand. Capture signals using different IF + LO combinations and develop a suitable image detection algorithm.

Ideas, comments and suggestions are welcome.

73's Phil...VK6APH

== PREVIOUS ARCHITECTURE ==

[[Image:Cyclops_Block_Diagram_090711.JPG|thumb|600px|]]
'''Cyclops''' is a 0 to 1GHz Spectrum Analyzer and Tracking Generator

Largely based on Scotty's Spectrum Analyser [SSA] http://www.scottyspectrumanalyzer.com/ but with a 96MHz second IF based around [[MERCURY|Mercury]] or [http://www.srl-llc.com/ QuickSilver]. Moving the second IF to 96MHz simplifies the filtering after the first mixer which means we can use a dielectric filter here rather than the multi-stage cavity filter used in the SSA.

Please note that the project is intended to develop a spectrum analyzer and not a broadband receiver - we will be grabbing a number of samples from the ADC and then processing them at our (PC's) leisure rather than doing this in real-time.

[[Image:DCP_3440_(Small).JPG|thumb|600px|Prototype Cyclops Powered Up!]]

Ideas, comments and suggestions are welcome.

73's Phil...VK6APH

== CURRENT STATUS ==

'''Update: 3 August 2011'''

Project has been restarted. The project has been dormant due to work on other HPSDR projects as well as a problem with high noise sidebands on both local oscillators. The noise problem appears to be due to the use of a squarewave 10MHz reference for the PLL chips beign use directly from the Atlas bus. By using a low level sine wave directly connected to the reference pin of the PLL chip the noise is considerably reduced.

Project team currenty consists of Berndt, VK5ABN, Kjell, LA2NI and Phil, VK6APH.

'''Update: 25th July 2009'''

Schematic and artwork are final for the prototype PC board. Proto PC Boards have been ordered. Thanks to all who took the time to review and comment. --- Graham, KE9H.

'''Update: 11th July 2009'''

Download the information package below, consisting of block diagram, schematics, and top level parts placement for review and comment. A first prototype PCB has been laid out, and comments, discussion and improvements are being solicited, prior to fabrication. --- Graham, KE9H.

[[Media: Cyclops_Binder_090711b.pdf]]

'''Update: 25th January 2009'''

Cyclops Schematics: Original Schematics were posted, now superseded by the above information.

'''Update: 10th April 2008'''

SAW 96MHz second IF filters and 1.030GHz dielectric filters have arrived as have all the remaining parts. Presently writing the Verilog code to set up the LMX2326 PLLs and building a breadboard to test the design.

'''Update: 4 December 2007'''

Bill, KD5TFD, and I have successfully modified the necessary software, based on the the C# 'MercScope' and 'SharpDSP' by Phil N8VB, to disp:xlay a 48-51MHz chunk of spectrum from Mercury. This represents a working proof of concept as far as the IF is concerned.

[[Image:Cyclops1.JPG|thumb|800px|Cyclops PC software processing a simulated input. Frequency span is 0 - 55MHz. A sort of Spectrum Analyzer "Hello World!".]]
Considerable feedback has indicated that basing the software design on C# and Windows based tools was not particularly popular.
There was strong support for a cross platform approach. In which case further development will be undertaken using Java for the GUI (including OpenGL), C/C++ for the processing logic and dttSP for the signal processing. Tom, N4WBS, has agreed to be lead programmer and I am delighted to welcome him to the project.

I have also looked at using a higher 2nd IF, 96MHz rather than 50MHz. This will further relax the specification of the GHz first IF filter and the availability of high performance SAW filters at this frequency will provide sufficient 2nd IF image rejection. The performance of Mercury at this frequency (an alias response) is totally acceptable.

== FEEDBACK ==

Al - N0TVJ - Good web site by S53MV with lots of relevant ideas http://lea.hamradio.si/~s53mv/spectana/vco.html

*Selected 1.030GHz first IF filter - Toko 6DFC-1030C-10
*Selected 96MHz second IF filter - RFM SF2135A www.rfm.com
*VCOs are by Crystek.

[[Category:Proposed hardware]]

HPSDRwiki:Community Portal

2012-11-29T06:52:38Z

VK6APH:

== [[FAQ]] - Frequently Asked Questions ==

This is a new section started to allow asking and hopefully answering questions about HPSDR.

== Documentation ==

*'''[[DOC]]''' This section contains links for downloading manuals for HPSDR Projects.

*'''[http://openhpsdr.org/support.php Support documentation]''' Build documents for users interested in building boards can be found here.

== Getting Started ==

*'''[[Hardware Introduction]]''' This is a guide for those new to HPSDR about exactly what hardware you need to be able to use the system.
*'''[[Quick Startup Guide]]'''

== Software ==

*'''[[SVN]] Subversion code versioning software ''' Source code in the process of development.

*'''[[HPSDR_related_software|Software links and introduction to software components.]] '''

* Links to HPSDR software and resources can be found on the [http://openhpsdr.org/resources.php Resource] page.

*'''[[DOWNLOADS]] - Firmware and Software''' Links to old firmware and software.

* Links to the Verilog/FPGA programming course by Kirk, KD7IRS -- see the [[Verilog]] page.

== Microsoft Windows XP, Vista, and Windows 7 Software ==

*'''[http://www.g3ukb.co.uk/ Acorn-SDR]''' by Bob Cowdery

*'''[http://www.dxatlas.com/CwSkimmer/ CW Skimmer]''' From Alex, VE3NEA, has support for Mercury

*'''[[KISS Konsole]]''', Written in C# and intended as a simple introduction to PC DSP programming.

*'''[https://java-sdr.dev.java.net/ java-sdr]''' Platform independent Java by John G0ORX/N6LYT.

*'''ghpsdr3 [[Multiple independent receivers - how to set up on Windows]]''' server & dspserver allow for multiple receivers (jmonitor) on a single Mercury (C version of the software)

*'''[[ghpsdr3-Qt]]''', written in C++/Qt with as a server/client or server/dspserver/client cross-platform framework by John G0ORX/N6LYT. All component programs compile on Windows, MacOS and Linux and the components can communicatebetween platforms

====PowerSDR====
*'''[[PowerSDR]] Running on Microsoft Windows XP. Vista, or Windows 7'''

*'''PowerSDR [[Quick Startup Guide (Windows)|Quick Startup Guide]]''' Documents to help users get HPSDR setup and working. Includes firmware upload instructions.

*'''[[Media:POWERSDR_USER_NOTES.pdf|Using Unique / Improved HPSDR Features]]''' Many PowerSDR features have been developed or improved specifically for HPSDR. Learn about using some of them here.

*'''[[HPSDR Digital Modes Operation using PowerSDR, Fldigi, VAC and com0com]]''' How to use additional programs to enable the digital modes using PowerSDR

*'''[[HPSDR Weak Signal Digital Modes Operation using PowerSDR with WSPR, WSJT9, JT65HF, VAC and VSP]]''' How to use additional programs to enable the weak signal digital modes using PowerSDR

*'''[[PowerSDR Keyboard Shortcut List ]]''' This page lists all the known PowerSDR keyboard shortcuts.

====USB drivers for Windows====

*'''[[libusb0 Notes]]''' used in Windows 32 and 64 bit systems

== Linux Software ==

*'''[[ghpsdr]]''', written in C with a [http://www.gtk.org/ GTK+] GUI by John G0ORX/N6LYT. http://javaguifordttsp.blogspot.com/

*'''[[ghpsdr3]]''', written in C with as a server/client or server/dspserver/client framework by John G0ORX/N6LYT. http://g0orx.blogspot.com/

*'''[[ghpsdr3-Qt]]''', written in C++/Qt with as a server/client or server/dspserver/client cross-platform framework by John G0ORX/N6LYT. All component programs compile on Windows, MacOS and Linux and the components can communicatebetween platforms

*'''[https://java-sdr.dev.java.net/ java-sdr]''' Platform independent Java by John G0ORX/N6LYT.

====Linux USB Drivers====

*'''[[libusb1.0 Notes]]''' used in Linux 32 and 64 bit systems

====Linux System Integration====

*'''[[SYSTEM INTEGRATION]]''' This section contains information relative to "putting the pieces together".

== MacOS X Software ==

*'''[[ghpsdr]]''', written in C with a [http://www.gtk.org/ GTK+] GUI by John G0ORX/N6LYT. http://javaguifordttsp.blogspot.com/

*'''[[ghpsdr3-Qt]]''', written in C++/Qt with as a server/client or server/dspserver/client cross-platform framework by John G0ORX/N6LYT. All component programs compile on Windows, MacOS and Linux and the components can communicate between platforms

*'''[[Heterodyne]]''' is a native Cocoa implementation of an HPSDR receiver. It uses currently John Melton's modified DttSP from ghpsdr to do the DSP work, but replaces out everything else with native Objective-C and Cocoa technologies. The current author and maintainer of the code is Jeremy McDermond ([[User:NH6Z|NH6Z]]).

*'''[https://java-sdr.dev.java.net/ java-sdr]''' Platform independent Java by John G0ORX/N6LYT.

==Cross Platform issues==

*'''[[USB Libraries]]''' Information of the various USB libraries used to access the [[OZY]] and [[MAGISTER]] interface boards.

==Multi-Receivers==

*'''[[Multi-Receiver]] How-to''' - This page explains the multi-receiver options and how-to set them up.

== Software Projects ==

* '''[[ATHENA]] - A software Server module''' - A project to build OS specific server code, module communication libraries and communication protocol documentation.

* '''[[KISS Konsole]] - Learning SDR Console''' - The KISS Konsole is a software project to provide a straightforward, well-commented User Interface to [[Mercury]] and other modules.

* '''[[VNA]] - Vector Network Analyser''' - The VNA software project to provide a firmware, software VNA using HPSDR hardware.

== HPSDR Radio Setup Examples ==

*'''[[A Basic HPSDR Transceiver in PANDORA]]''' provides another example of how a [[PANDORA|Pandora]] enclosure can be used for the amateur radio experimenter.

*'''[[A complete HPSDR transceiver in a Pandora Box]]''' provides an example of how to build a transceiver using HPSDR components in a [[PANDORA|Pandora]] enclosure, other available hardware and PowerSDR.

*'''[[A complete HPSDR transceiver]]''' provides an example of how to build your own transceiver using HPSDR components and other available hardware and software.

*'''[[The Antec P183 Solution]]''' an example of how to build your own transceiver using HPSDR components and other available hardware and software in a traditional a mid-tower PC enclosure.

*'''[[The Tokyo Hy-Power HL-45B Solution]]''' an example of how to add a commercial solid state 45 Watt Amplifier to your HPSDR rig.

*'''[[The Rino R-1 Solution]]''' a smaller PC case solution with an optical drive included.

*'''[[The Antec Minuet Solution]]''' the smallest PC case solution attempted so far.

==Hardware Configuration Cautions==

*'''[[Never Short a Penelope by AD9DP]]''' This short paper tells you why you should never operate Penelope into a shorted load.

*'''[[Using Penelope with a linear amplifier]]''' When using Penelope with a linear amplifier you need to ensure you use enough drive. This paper explains why.

== HPSDR Performance Tests ==

The purpose of these pages are to establish HPSDR performance measurement process standards.

==== Receiver Performance Tests ====
* Mercury: [[Receiver Performance Tests]]
* PowerSDR, HPSDR, Flex [[AGC Tests]]
* Active Antennas and HPSDR: [[Antenna Performance Tests]]

==== Transmitter Performance Tests ====

* PennyWhistle: '''[[VNA Sweeps]]'''

== Hardware Projects ==

=== Completed ===

==== Common ====

* '''[[ATLAS]] - Backplane''' - The Atlas is a passive backplane that all other modules plug into.

* '''[[LPU]] - Simple Linear Power Unit''' - The LPU unit takes power from a regulated power supply and steps it to the input needed by Atlas.

* '''[[METIS]] - (formerly called OzyII) - A high speed PC interface''' - High speed PC interface using Ethernet PHY.

* '''[[MERCURY]] - 0-65 MHz Direct Sampling Receiver''' - Perhaps the most exciting of all modules, Mercury will enable direct sampling of the 0-55 MHz spectrum.

* '''[[MAGISTER]] - USB 2.0 to Atlas Bus Interface''' - The Magister module is an alternative to OZY and METIS.

* '''[[PENNYLANE]] - Two stage Penelope''' - This is a two stage penelope based on changes made in the Hermes boards.

==== Primarily Mercury and Penelope related ====

* '''[[Antenna Switch|ANTENNA SWITCH]] - by NT-Electronics''' - An antenna switch for use with Penelope and Mercury when Alex is not used, also has optional low Noise RX Amplifier for 6 meters

==== Primarily Phoenix and Janus related ====

* '''[[JANUS]] - ADC/DAC Board''' - The Janus module is a very high performance, dual, full duplex, audio frequency A/D and D/A converter board.

==== Optional ====

* '''[[ALEXIARES]] - RF Preselector''' - Alexiares (or Alex for short) is a set of RF Bandpass filters for use with Mercury and Penelope or any other SDR. Alex also contain an RX/TX antenna switch.

* '''[[PANDORA]] - Enclosure''' - HPSDR enclosure.

* '''[[EXCALIBUR]] - Clock Reference board''' - A board to allow an external 10 MHz frequency reference interface.

* '''[[PINOCCHIO]] - Extender Card''' - Pinocchio is an extender card to allow measurements and troubleshooting of an active card in an ATLAS back-plane.

* '''[[HERCULES]] - By NT-Electronics''' - A 100 Watt amplifier designed to be compatible with current HPSDR hardware (Atlas, Penelope, Mercury, and Magister/Ozy).

* '''[[PENNYWHISTLE]] - 20 Watt RF Power Ampilfier''' - The PennyWhistle takes the RF output of Penelope and amplifies it to approximately 20 watts.

===Completed but unavailable===

* '''[[PENELOPE]] - Companion Exciter to Mercury''' - A 1/2 watt DUC(k).

* '''[[OZY]] - HPSDR Host Interface & Control''' - The OZY module is an FPGA based interface controller card providing input and output connections to the real world. Now replaced by the MAGISTER or METIS module - see above.

===Future hardware===
====Hardware nearing completion====

* '''[[HERMES]] - A DUC/DDC Transceiver''' - Merging the verilog code of Mercury and Penelope into a single FPGA, on a single board.

* '''[[APOLLO]] - 15W PA and Filter''' - A companion 15W PA and Low Pass Filter for [[HERMES|Hermes]].

* '''[[PHOENIX]] - QSD/QSE Receiver/Transmitter Module''' - QSD based HF Receiver, a QSE based HF Exciter and a supporting synthesizer.

====Proposed hardware====

* '''[[CYCLOPS]] - Spectrum Analyzer''' - Cyclops is a 0-6 GHz spectrum analyzer with tracking generator support.

* '''[[DEMETER]] - Power Supply''' - Power supply designed for HPSDR.

* '''[[GIBRALTAR]] - GPS-disciplined Frequency Standard''' - Gibraltar is a GPS-disciplined frequency standard board.

* '''[[ODYSSEY]] - Low Power Handheld SDR''' - Odyssey includes a low power SDR based on the QSD, QSE, and a dsPIC33 as the basic radio core.

* '''[[THOR]] - High Efficiency HF Power Amplifier''' - Thor is a high efficiency HF power amplifier using Envelope Elimination and Restoration (ERR) techniques.

* '''[[MUNIN]] - 100W HF Power Amplifier''' - Munin is a 100W HF power amplifier, This hardware is dependent on Alex filters.

* '''[[GRIFFIN]] - A Chirp-WSPR beacon board''' - This board is a stand alone beacon board.

====Other proposed/future hardware====

* '''[[ANICETUS]] (Anie) - Preselector''' - A few designs for narrow band preselectors.

* '''[[EPIMETHEUS]] - General Purpose I/O''' - Epi is a general purpose I/O board for the Atlas bus and includes relays, open collectors, IF switching, etc.

* '''[[HELIOS]] - Helios Small Transmitting Loop Antenna and Controller.

* '''[[HORTON]] - Receiver Module''' - A receiver module integrating the Janus ADC with a QSD on a board for a version of the HPSDR RX board.

* '''[[PROTEUS]] - Prototyping Board''' - This is the planned prototyping board.

* '''[[SASQUATCH]] - DSP back-end''' - The Sasquatch board is a hardware DSP back-end intended for use by constructors who would like to operate stand-alone rather than attached to a PC.

* '''[[GPSTCXO]] - GPSTCXO Based Design''' - Here is some reference material regarding a GPSTCXO Based design as an alternative timing standard for the HPSDR Platform.

== [[Board Designer's Resources]] ==

== [[ANCILLARY]] - Additional "stuff" of interest to HPSDR ==
Some stuff like Norton Amplifier, FPGA VHDL/Verilog ...

== [[EXPERIMENTERS-CORNER]] - Ideas not yet projects ==

== [[ADMINISTRATION-NEWS]] - Messages about HPSDR web, wiki, discussion list ==
__NOTOC__

[[Category:Community| ]]
[[Category:Hardware| ]]
[[Category:Categories]]
[[Category:Developer resources| ]]

KISS Konsole

2012-10-26T01:08:25Z

VK6APH:

[[Image:KKV1.0.0.jpg|thumb|400px|Here is screen shot of V1.0.0. The upper green trace is the full spectrum from 0 - 55MHz and the lower white trace 48kHz of the 20m band. Click to enlarge.]]
K.I.S.S (Keep It Simple Stupid) Konsole is a straightforward PC program that will allow beginners in SDR and DSP programming to get their feet wet.

KK is intended as a learning experience and not as a competitor or replacement for any existing Console code. Where it goes and what features get added is up to you.

KISS Konsole is written in C# using the free VS 2008 IDE. The code is heavily commented and aimed at the newbie programmer. It is straight line code with as simple a format as possible.

The code is available under SVN at:

http://svn.tapr.org/repos_hpsdr_kiss

([[How to use SVN]])

The directory structure is:

:\branches - directories containing alpha code from some of the developers. Since it's alpha code the usual caveats apply!
:\tags - directories containing previous Stable Releases
:\trunk - directories containing current Stable Release, Beta Release for user testing, Documents etc

Beginners, intermediate and expert programmers are encouraged to play with the code, make modifications and share them with the group.

If you would like to share your modifications with the HPSDR community then please:

*make your code available under the terms of the GNU General Public License; and

*Any code you write MUST HAVE SUITABLE COMMENTS in it - too many comments will get you a higher grade! If you find/know a better way of doing something then explain in the comments how it works and how it’s implemented.

As a novice C# programmer myself my deep gratitude to Bill, KD5TFD, Dave, WA8YWQ and Joe K5SO for their invaluable assistance in getting KK released. We also owe Phil, N8VB our thanks for making his SharpDSP library available under GPL.

Links to other pages:

* Known [[KISS Konsole Bugs|bugs]]
* [[KISS Konsole FAQ|Frequently Asked Questions]]
* Feature [[KISS Konsole Requests|requests]]
* Programmers [[KISS Konsole Notes|Notes]]

Phil VK6APH

[[Category:KISS Konsole| ]]

File:Hermes VNA.JPG

2012-08-16T01:22:23Z

VK6APH: uploaded a new version of "File:Hermes VNA.JPG"

VNA

2012-08-16T01:19:36Z

VK6APH:

==Vector Network Analyser==

This project is to develop PC and FPGA software in order to use Hermes (and possibly Mercury, PennyLane and Metis) as a Vector Network Analyser.

Project Leader: Phil VK6APH

====Update 14 August 2012====

FPGA code for Hermes has been developed and tested that enables the transmitter (which will be used as the VNA signal source) and receiver in Hermes to be phase synchronous.

PC code has been written (in C# using the free Visual Studio 2010 software) to implement the Reflection function of a VNA. The code draws a Smith Chart, which is zoomable, and displays the Impedance being measured as a complex value on the chart. Additionally, the equivalent series and parallel impedance is displayed as are the equivalent component values at the measurement frequency. The VSWR and Return Loss are also displayed.

The code enables Open/Short/Load calibration to be made (presently at a single frequency); the calibration data can be saved to a file and subsequently re-loaded as required. The repeatability of measurements after loading the previous calibration data is excellent.

The screen shot shows the current status of the PC software. An number of items being displayed are for debug purposes only and will be removed when no longer required.

The additional code required in the Hermes FPGA is very small. In which case a future version of code will include the ability to use Hermes in VNA mode via a Command & Control flag.

[[Image:Hermes_VNA.JPG|thumb|500px|VNA Screen Shot. Click to enlarge.]]

File:Hermes VNA.JPG

2012-08-16T01:18:17Z

VK6APH:

File:Hermes VNA.jpg

2012-08-16T01:16:43Z

VK6APH: uploaded a new version of "File:Hermes VNA.jpg"

File:Hermes VNA.jpg

2012-08-16T01:14:16Z

VK6APH: uploaded a new version of "File:Hermes VNA.jpg"

VNA

2012-08-16T01:12:43Z

VK6APH:

==Vector Network Analyser==

This project is to develop PC and FPGA software in order to use Hermes (and possibly Mercury, PennyLane and Metis) as a Vector Network Analyser.

Project Leader: Phil VK6APH

====Update 14 August 2012====

FPGA code for Hermes has been developed and tested that enables the transmitter (which will be used as the VNA signal source) and receiver in Hermes to be phase synchronous.

PC code has been written (in C# using the free Visual Studio 2010 software) to implement the Reflection function of a VNA. The code draws a Smith Chart, which is zoomable, and displays the Impedance being measured as a complex value on the chart. Additionally, the equivalent series and parallel impedance is displayed as are the equivalent component values at the measurement frequency. The VSWR and Return Loss are also displayed.

The code enables Open/Short/Load calibration to be made (presently at a single frequency); the calibration data can be saved to a file and subsequently re-loaded as required. The repeatability of measurements after loading the previous calibration data is excellent.

The screen shot shows the current status of the PC software. An number of items being displayed are for debug purposes only and will be removed when no longer required.

The additional code required in the Hermes FPGA is very small. In which case a future version of code will include the ability to use Hermes in VNA mode via a Command & Control flag.

[[Image:Hermes_VNA.jpg|thumb|500px|VNA Screen Shot. Click to enlarge.]]

2012-01-06T03:51:55Z

VK6APH:

CYCLOPS

2012-01-06T03:51:16Z

VK6APH:

== An Alterative Cyclops Architecture ====

''' 6 Jan 2012 '''

The description of the current Cyclops project follows very conventional lines i.e. input mixer, microwave LO, first IF above the highest LO frequency, second mixer with fixed second LO and second IF in the VHF range. Nothing very different here and the design follows many existing examples.
Whilst the prototypes performed adequately, a review of more current technologies indicates a possible alternative approach that has a number of advantages but also some disadvantages.
An alternative architecture is as shown in the block diagram below. This is a simple down converter that uses an IF in the 0 to 55MHz range (that will be fed to Mercury).

[[Image:CyclopsIII.JPG]]

By using a single chip VCO + PLL (e.g. ADF4351) we can build a spectrum analyser that will cover the range from 0Hz to 4.4GHz.
As you can see this is very simple from a hardware perspective. However, this simplification does come at a price – in the form of a total lack of image rejection.
For example, assume we want to display an input signal at 100MHz. We can arbitrarily select an IF frequency of say 10MHz which we tune Mercury to. In order that the signal spectrum is not reversed on the PC display we place the LO at 100 – 10 = 90MHz.
This will work just fine. But if there is also a signal at 90 - 10 = 80MHz (i.e. an image frequency) this will also be displayed and without some signal processing it will not be possible to determine if this signal is actually at 100MHz or 80MHz.
Since we are using Mercury as our IF receiver we have a vast array of possible LO and IF frequency combinations that could be used. So, if we now tune Mercury to say 20MHz and set our LO to 80MHz then our 100MHz signal will be displayed but the 80MHz image will not. Once again we could choose an IF of 30MHz, a LO of 70MHz and again the 80MHz image will not be displayed.
So, if we make a measurement with number of different IF + LO combinations and the FFT result is identical (perhaps not identical, but very similar due to the noise floor etc) we can be pretty sure that we are not being affected by any image signals. If only a few of the measurements are similar then we can choose one of these to display.
There are other techniques we can use to detect an image e.g. keep the IF fixed but move the LO to the image frequency. The FFT output would need to be reversed in this case before the spectrums are compared, but that is simple enough to do.
With this architecture the problem of detecting and eliminating images becomes one of software processing rather than filtering as in the case of a conventional spectrum analyser.
I investigated this architecture further using an AD4350 evaluation board connected to an ADE11X mixer, using Mercury as the IF plus PowerSDR as the display. This works very well and even without any image software processing makes a useful item of test equipment.
The ADF4351 uses a microwave VCO in the 3 to 4GHz range. To provide lower frequencies the VCO output is passed through (internal) dividers such that the output will cover the frequency range from 35 to 4400MHz. By using a divider the phase noise of the VCO is reduced such that over the 0-1GHz range the overall performance is superior to that of the prototype Cyclops board. The VCO is integral to the chip in which case the phase noise is not particularly good in comparison to say a YIG oscillator. However, when divided down it does make a most useful piece of test equipment.

In summary the advantages of the alternative architecture are:
• Wider frequency coverage 0 – 4.4GHz
• Much simpler and hence lower cost
• Improved phase noise performance
• No modifications to Mercury hardware required (Original Cyclops required the input filter to be bypassed in order to use as a 95MHz IF)

Disadvantages:
• More complex PC software required to detect images
• May not be possible to eliminate all images e.g. wide band or fast moving signals

A companion tracking generator could be built on the same board using a second ADF4351 and either a DDS chip or Penny(Lane) used as its reference. The combination could also be used as a Vector Network Analyser.
An alternative to the ADF4351 is the Hittite HMC830LP6GE which provides output in the range 25 – 3000MHz and appears to offer lower phase noise.

'''Next Step.''' Modify PowerSDR so that the bandscope data can be saved to a file on demand. Capture signals using different IF + LO combinations and develop a suitable image detection algorithm.

Ideas, comments and suggestions are welcome.

73's Phil...VK6APH

Previous Architecture

[[Image:Cyclops_Block_Diagram_090711.JPG|thumb|600px|]]
'''Cyclops''' is a 0 to 1GHz Spectrum Analyzer and Tracking Generator

Largely based on Scotty's Spectrum Analyser [SSA] http://www.scottyspectrumanalyzer.com/ but with a 96MHz second IF based around [[MERCURY|Mercury]] or [http://www.srl-llc.com/ QuickSilver]. Moving the second IF to 96MHz simplifies the filtering after the first mixer which means we can use a dielectric filter here rather than the multi-stage cavity filter used in the SSA.

Please note that the project is intended to develop a spectrum analyzer and not a broadband receiver - we will be grabbing a number of samples from the ADC and then processing them at our (PC's) leisure rather than doing this in real-time.

[[Image:DCP_3440_(Small).JPG|thumb|600px|Prototype Cyclops Powered Up!]]

Ideas, comments and suggestions are welcome.

73's Phil...VK6APH

== CURRENT STATUS ==

'''Update: 3 August 2011'''

Project has been restarted. The project has been dormant due to work on other HPSDR projects as well as a problem with high noise sidebands on both local oscillators. The noise problem appears to be due to the use of a squarewave 10MHz reference for the PLL chips beign use directly from the Atlas bus. By using a low level sine wave directly connected to the reference pin of the PLL chip the noise is considerably reduced.

Project team currenty consists of Berndt, VK5ABN, Kjell, LA2NI and Phil, VK6APH.

'''Update: 25th July 2009'''

Schematic and artwork are final for the prototype PC board. Proto PC Boards have been ordered. Thanks to all who took the time to review and comment. --- Graham, KE9H.

'''Update: 11th July 2009'''

Download the information package below, consisting of block diagram, schematics, and top level parts placement for review and comment. A first prototype PCB has been laid out, and comments, discussion and improvements are being solicited, prior to fabrication. --- Graham, KE9H.

[[Media: Cyclops_Binder_090711b.pdf]]

'''Update: 25th January 2009'''

Cyclops Schematics: Original Schematics were posted, now superseded by the above information.

'''Update: 10th April 2008'''

SAW 96MHz second IF filters and 1.030GHz dielectric filters have arrived as have all the remaining parts. Presently writing the Verilog code to set up the LMX2326 PLLs and building a breadboard to test the design.

'''Update: 4 December 2007'''

Bill, KD5TFD, and I have successfully modified the necessary software, based on the the C# 'MercScope' and 'SharpDSP' by Phil N8VB, to disp:xlay a 48-51MHz chunk of spectrum from Mercury. This represents a working proof of concept as far as the IF is concerned.

[[Image:Cyclops1.JPG|thumb|800px|Cyclops PC software processing a simulated input. Frequency span is 0 - 55MHz. A sort of Spectrum Analyzer "Hello World!".]]
Considerable feedback has indicated that basing the software design on C# and Windows based tools was not particularly popular.
There was strong support for a cross platform approach. In which case further development will be undertaken using Java for the GUI (including OpenGL), C/C++ for the processing logic and dttSP for the signal processing. Tom, N4WBS, has agreed to be lead programmer and I am delighted to welcome him to the project.

I have also looked at using a higher 2nd IF, 96MHz rather than 50MHz. This will further relax the specification of the GHz first IF filter and the availability of high performance SAW filters at this frequency will provide sufficient 2nd IF image rejection. The performance of Mercury at this frequency (an alias response) is totally acceptable.

== FEEDBACK ==

Al - N0TVJ - Good web site by S53MV with lots of relevant ideas http://lea.hamradio.si/~s53mv/spectana/vco.html

*Selected 1.030GHz first IF filter - Toko 6DFC-1030C-10
*Selected 96MHz second IF filter - RFM SF2135A www.rfm.com
*VCOs are by Crystek.

[[Category:Proposed hardware]]

File:CyclopsIII.pdf

2012-01-06T03:49:17Z

VK6APH: uploaded a new version of "File:CyclopsIII.pdf"

CYCLOPS

2012-01-06T03:47:50Z

VK6APH:

== An Alterative Cyclops Architecture ====

''' 6 Jan 2012 '''

The description of the current Cyclops project follows very conventional lines i.e. input mixer, microwave LO, first IF above the highest LO frequency, second mixer with fixed second LO and second IF in the VHF range. Nothing very different here and the design follows many existing examples.
Whilst the prototypes performed adequately, a review of more current technologies indicates a possible alternative approach that has a number of advantages but also some disadvantages.
An alternative architecture is as shown in the block diagram below. This is a simple down converter that uses an IF in the 0 to 55MHz range (that will be fed to Mercury).

[[Image:CyclopsIII.PDF]]

By using a single chip VCO + PLL (e.g. ADF4351) we can build a spectrum analyser that will cover the range from 0Hz to 4.4GHz.
As you can see this is very simple from a hardware perspective. However, this simplification does come at a price – in the form of a total lack of image rejection.
For example, assume we want to display an input signal at 100MHz. We can arbitrarily select an IF frequency of say 10MHz which we tune Mercury to. In order that the signal spectrum is not reversed on the PC display we place the LO at 100 – 10 = 90MHz.
This will work just fine. But if there is also a signal at 90 - 10 = 80MHz (i.e. an image frequency) this will also be displayed and without some signal processing it will not be possible to determine if this signal is actually at 100MHz or 80MHz.
Since we are using Mercury as our IF receiver we have a vast array of possible LO and IF frequency combinations that could be used. So, if we now tune Mercury to say 20MHz and set our LO to 80MHz then our 100MHz signal will be displayed but the 80MHz image will not. Once again we could choose an IF of 30MHz, a LO of 70MHz and again the 80MHz image will not be displayed.
So, if we make a measurement with number of different IF + LO combinations and the FFT result is identical (perhaps not identical, but very similar due to the noise floor etc) we can be pretty sure that we are not being affected by any image signals. If only a few of the measurements are similar then we can choose one of these to display.
There are other techniques we can use to detect an image e.g. keep the IF fixed but move the LO to the image frequency. The FFT output would need to be reversed in this case before the spectrums are compared, but that is simple enough to do.
With this architecture the problem of detecting and eliminating images becomes one of software processing rather than filtering as in the case of a conventional spectrum analyser.
I investigated this architecture further using an AD4350 evaluation board connected to an ADE11X mixer, using Mercury as the IF plus PowerSDR as the display. This works very well and even without any image software processing makes a useful item of test equipment.
The ADF4351 uses a microwave VCO in the 3 to 4GHz range. To provide lower frequencies the VCO output is passed through (internal) dividers such that the output will cover the frequency range from 35 to 4400MHz. By using a divider the phase noise of the VCO is reduced such that over the 0-1GHz range the overall performance is superior to that of the prototype Cyclops board. The VCO is integral to the chip in which case the phase noise is not particularly good in comparison to say a YIG oscillator. However, when divided down it does make a most useful piece of test equipment.

In summary the advantages of the alternative architecture are:
• Wider frequency coverage 0 – 4.4GHz
• Much simpler and hence lower cost
• Improved phase noise performance
• No modifications to Mercury hardware required (Original Cyclops required the input filter to be bypassed in order to use as a 95MHz IF)

Disadvantages:
• More complex PC software required to detect images
• May not be possible to eliminate all images e.g. wide band or fast moving signals

A companion tracking generator could be built on the same board using a second ADF4351 and either a DDS chip or Penny(Lane) used as its reference. The combination could also be used as a Vector Network Analyser.
An alternative to the ADF4351 is the Hittite HMC830LP6GE which provides output in the range 25 – 3000MHz and appears to offer lower phase noise.

'''Next Step.''' Modify PowerSDR so that the bandscope data can be saved to a file on demand. Capture signals using different IF + LO combinations and develop a suitable image detection algorithm.

Ideas, comments and suggestions are welcome.

73's Phil...VK6APH

Previous Architecture

[[Image:Cyclops_Block_Diagram_090711.JPG|thumb|600px|]]
'''Cyclops''' is a 0 to 1GHz Spectrum Analyzer and Tracking Generator

Largely based on Scotty's Spectrum Analyser [SSA] http://www.scottyspectrumanalyzer.com/ but with a 96MHz second IF based around [[MERCURY|Mercury]] or [http://www.srl-llc.com/ QuickSilver]. Moving the second IF to 96MHz simplifies the filtering after the first mixer which means we can use a dielectric filter here rather than the multi-stage cavity filter used in the SSA.

Please note that the project is intended to develop a spectrum analyzer and not a broadband receiver - we will be grabbing a number of samples from the ADC and then processing them at our (PC's) leisure rather than doing this in real-time.

[[Image:DCP_3440_(Small).JPG|thumb|600px|Prototype Cyclops Powered Up!]]

Ideas, comments and suggestions are welcome.

73's Phil...VK6APH

== CURRENT STATUS ==

'''Update: 3 August 2011'''

Project has been restarted. The project has been dormant due to work on other HPSDR projects as well as a problem with high noise sidebands on both local oscillators. The noise problem appears to be due to the use of a squarewave 10MHz reference for the PLL chips beign use directly from the Atlas bus. By using a low level sine wave directly connected to the reference pin of the PLL chip the noise is considerably reduced.

Project team currenty consists of Berndt, VK5ABN, Kjell, LA2NI and Phil, VK6APH.

'''Update: 25th July 2009'''

Schematic and artwork are final for the prototype PC board. Proto PC Boards have been ordered. Thanks to all who took the time to review and comment. --- Graham, KE9H.

'''Update: 11th July 2009'''

Download the information package below, consisting of block diagram, schematics, and top level parts placement for review and comment. A first prototype PCB has been laid out, and comments, discussion and improvements are being solicited, prior to fabrication. --- Graham, KE9H.

[[Media: Cyclops_Binder_090711b.pdf]]

'''Update: 25th January 2009'''

Cyclops Schematics: Original Schematics were posted, now superseded by the above information.

'''Update: 10th April 2008'''

SAW 96MHz second IF filters and 1.030GHz dielectric filters have arrived as have all the remaining parts. Presently writing the Verilog code to set up the LMX2326 PLLs and building a breadboard to test the design.

'''Update: 4 December 2007'''

Bill, KD5TFD, and I have successfully modified the necessary software, based on the the C# 'MercScope' and 'SharpDSP' by Phil N8VB, to disp:xlay a 48-51MHz chunk of spectrum from Mercury. This represents a working proof of concept as far as the IF is concerned.

[[Image:Cyclops1.JPG|thumb|800px|Cyclops PC software processing a simulated input. Frequency span is 0 - 55MHz. A sort of Spectrum Analyzer "Hello World!".]]
Considerable feedback has indicated that basing the software design on C# and Windows based tools was not particularly popular.
There was strong support for a cross platform approach. In which case further development will be undertaken using Java for the GUI (including OpenGL), C/C++ for the processing logic and dttSP for the signal processing. Tom, N4WBS, has agreed to be lead programmer and I am delighted to welcome him to the project.

I have also looked at using a higher 2nd IF, 96MHz rather than 50MHz. This will further relax the specification of the GHz first IF filter and the availability of high performance SAW filters at this frequency will provide sufficient 2nd IF image rejection. The performance of Mercury at this frequency (an alias response) is totally acceptable.

== FEEDBACK ==

Al - N0TVJ - Good web site by S53MV with lots of relevant ideas http://lea.hamradio.si/~s53mv/spectana/vco.html

*Selected 1.030GHz first IF filter - Toko 6DFC-1030C-10
*Selected 96MHz second IF filter - RFM SF2135A www.rfm.com
*VCOs are by Crystek.

[[Category:Proposed hardware]]

File:CyclopsIII.pdf

2012-01-06T03:46:10Z

VK6APH:

2011-07-07T07:27:04Z

VK6APH:

'''
''' Hermes - A DUC/DDC Transceiver '''

[[Image:Hardware_Block_Diagram_1_8.JPG|thumb|500px|Hardware block diagram. Click to enlarge.]]
Project Leader: Kevin M0KHZ

Hermes is a single board Digital Up and Down Conversion (DUC/DDC) full duplex HF + 6m multi-mode transceiver.

It is basically the [[MERCURY|Mercury]], [[PENELOPE|Penelope]], [[METIS|Metis]] and [[EXCALIBUR|Excalibur]] boards rolled into one PCB. The board communicates to an associated PC via 100T/1000T Ethernet.

Hermes has the following features and facilities:

* Uninterrupted coverage from 50kHz to 54MHz
* Transmit and receiver image rejection > 110dB
* Full duplex operation, any split over entire 160m to 6m range
* Future expansion possible to eight independent receivers using the same antenna
* 500mW RF output on 160 – 6m amateur bands
* Built-in high performance preamp, with a noise floor typically -135dBm in 500Hz
* Software-selectable 31dB input attenuator in 1dB steps
* High performance receiver – same specifications as the HPSDR Mercury receiver (ie Blocking Dynamic Range typically about 125dB)
* FPAG code can be updated via the Ethernet connection
* Seven user-configurable open-collector outputs, independently selectable per band and Tx/Rx (for relay control, etc - with sequencing via PC code)
* Separate open-collector PTT connection for amplifier control, etc, with sequencer
* Microphone PTT jumper-selectable from tip or ring connection
* Bias for electret microphones via jumper
* Four user-configurable 12 bit analogue inputs (for ALC, SWR etc)
* Three user-configurable digital inputs (for linear amplifier over temperature, etc)
* Optional in-built switch mode power supply – less than xxxmA (receive) from a 13.8V supply
* I2C bus connector for control of external equipment
* Full QSK using the Kiss Konsole software, since digital signal processing is not used in the controlling PC for CW carrier generation
* Low-level transmitter output for transverter use (0dBm) as well as user-selectable output attenuator
* Stereo audio outputs at line and headphone levels
* In-built 1W stereo audio amplifier for directly driving speakers
* Direct, de-bounced connections for a Morse key (straight or iambic) and PTT
* 122.88MHz master clock, which can be phase-locked to an internal 10MHz TCXO or external frequency reference
* Jumper-selectable external frequency reference, with signal processing, to suit numerous GPS-locked 10MHz reference sources
* Direct ribbon cable interface to [[Apollo]] 15W power amplifier, low pass filters and automatic ATU.
* Low noise, high efficiency, Switching Power Supply designed by Kjell Karson,LA2NI
* Ethernet interface supports fixed, APIP or DHCP IP address
* Hermes responds to ping and ARP requests, auto senses Ethernet cable connection and connection speed

[[Apollo]] is a combined 15w PA, Low Pass Filter bank and Automatic ATU. The Apollo project is led by Kjell Karlsen LA2NI.

[[Image:hermesapolloincase.jpg|thumb|500px|Hermes and Apollo in enclosure - photo copyright Kjell Karlsen 2010.]]

====Update 7 July 2011====

A prototype board has been built and tested. The board is fully functional and meets or exceeds the performance of the Mercury/Penelope/Metis/Excalibur boards the design is based on.

Some minor board layout issues are currently being addressed and a pre-production layout is presently being prepared.
The KD5TFD and W5WC versions of PowerSDR(TM) as well as KISS Konsole have been modified to provide native Hermes support.

Ken, K9VV, has a lot on information regarding Hermes on his web site here http://www.n9vv.com/hamradio.html

[[Image:Hermes.jpg|thumb|500px|center|caption (click for larger image) photo courtesy Abhi Arunoday ]]

[[Category:Hermes| ]]