MAGISTER - Revision history

NH6Z at 19:50, 15 September 2011

2011-09-15T19:50:21Z

2010-09-21T02:01:22Z

2010-09-21T01:57:21Z

2010-09-19T19:01:15Z

design files now relesed under OHL.

2010-01-25T20:07:35Z

wiki

2010-01-25T20:07:15Z

wiki

2010-01-25T17:48:14Z

+cat

2009-09-28T16:11:21Z

new file link for PCBs

2009-09-25T09:11:03Z

move images to right, caption

2009-09-18T16:05:37Z

Deleted hanging sentence about FPGA.

@@ Line 6: / Line 6: @@
 The USB interface uses a Cypress FX2 chip, supporting full duplex USB communications at > 30MB/s.
-''NOTE: Magister is no longer available from TAPR.''
+'''Magister is available from [http://www.iquadlabs.com iQuadLabs]'''
 ===Magister Development History===

@@ Line 6: / Line 6: @@
 The USB interface uses a Cypress FX2 chip, supporting full duplex USB communications at > 30MB/s.
-''NOTE: Penelope is no longer available from TAPR.''
+''NOTE: Magister is no longer available from TAPR.''
 ===Magister Development History===

← Older revision		Revision as of 01:57, 21 September 2010
Line 5:		Line 5:

	The USB interface uses a Cypress FX2 chip, supporting full duplex USB communications at > 30MB/s.		The USB interface uses a Cypress FX2 chip, supporting full duplex USB communications at > 30MB/s.
		+
		+	''NOTE: Penelope is no longer available from TAPR.''

	===Magister Development History===		===Magister Development History===

@@ Line 8: / Line 8: @@
 ===Magister Development History===
 [[Image:Magister2.gif|thumb|500px|Magister prototype in operation with Mercury]]
-The project was undertaken by KK7P in mid-summer 2009.  Three prototypes were constructed by early September 2009.  Magister loads and runs current HPSDR code.  Further testing is underway as this is written (19 September 2009).
+The project was undertaken by KK7P in mid-summer 2009.  Three prototypes were constructed by early September 2009.  Magister loads and runs current HPSDR code.
-Magister is initially released under the TAPR NCL until TAPR has an opportunity to build an initial quantity and distribute them.
+Magister was initially released under the TAPR NCL until TAPR hds an opportunity to build an initial quantity and distribute them.
 Design material are available on hamsdr.
-* PCB files: http://www.hamsdr.com/personaldirectory.aspx?id=1008
+* PCB files: http://www.hamsdr.com/personaldirectory.aspx?id=1108
-* Schematic: http://www.hamsdr.com/personaldirectory.aspx?id=1004
+* Schematic: http://www.hamsdr.com/personaldirectory.aspx?id=1109
-Note the PCB files do not include drill information.  Once Magister initial production is concluded, the PCB materials will be posted complete, and the entire design will re-released under the TAPR OHL.
+The PCB files are complete, and the entire design is released under the TAPR OHL.
 [[Category:Hardware available]]

@@ Line 2: / Line 2: @@
 The project leader for the Magister board is Lyle Johnson, KK7P
-Magister is an FPGA based interface controller card that provides a high-speed USB 2.0 interface for the Atlas bus, as well as limited additional I/O lines intended for radio control (e.g., bandswitching, CW paddle and so forth).  It uses the same Altera Cyclone II FPGA as Ozy and is capable of running the current Ozy code (as of 19 September 2009).
+'''Magister''' is an FPGA based interface controller card that provides a high-speed USB 2.0 interface for the Atlas bus, as well as limited additional I/O lines intended for radio control (e.g., bandswitching, CW paddle and so forth).  It uses the same Altera Cyclone II FPGA as Ozy and is capable of running the current Ozy code (as of 19 September 2009).
 The USB interface uses a Cypress FX2 chip, supporting full duplex USB communications at > 30MB/s.

← Older revision		Revision as of 17:48, 25 January 2010
Line 17:		Line 17:

	Note the PCB files do not include drill information. Once Magister initial production is concluded, the PCB materials will be posted complete, and the entire design will re-released under the TAPR OHL.		Note the PCB files do not include drill information. Once Magister initial production is concluded, the PCB materials will be posted complete, and the entire design will re-released under the TAPR OHL.
		+
		+	[[Category:Hardware available]]

@@ Line 13: / Line 13: @@
 Design material are available on hamsdr.
-:PCB files  : http://www.hamsdr.com/personaldirectory.aspx?id=1005
+:PCB files  : http://www.hamsdr.com/personaldirectory.aspx?id=1008
 :Schematic  : http://www.hamsdr.com/personaldirectory.aspx?id=1004
 Note the PCB files do not include drill information.  Once Magister initial production is concluded, the PCB materials will be posted complete, and the entire design will re-released under the TAPR OHL.

← Older revision		Revision as of 16:05, 18 September 2009
Line 7:		Line 7:

	The USB interface uses a Cypress FX2 chip, supporting full duplex USB communications at > 30MB/s.		The USB interface uses a Cypress FX2 chip, supporting full duplex USB communications at > 30MB/s.
−
−	~~The FPGA also provides the necessary control logic and data formatting for the Janus board as well serial and parallel interfaces for user defined I/O.~~

	[[Image:Magister1.gif]]		[[Image:Magister1.gif]]