Difference between revisions of "FIRMWARE"

From HPSDRwiki
Jump to: navigation, search
(Created page with "== HPSDR Firmware Loading == The Current version of the Firmware can be found on the Downloads section of the website is [http://openhpsdr.org/download.php Downloads] The veril...")
 
Line 1: Line 1:
== HPSDR Firmware Loading ==
+
=== HPSDR Firmware Loading ===
  
 
The Current version of the Firmware can be found on the Downloads section of the website is [http://openhpsdr.org/download.php Downloads]
 
The Current version of the Firmware can be found on the Downloads section of the website is [http://openhpsdr.org/download.php Downloads]
Line 5: Line 5:
 
The verilog code for each of the Field Programmable Gate Arrays (FPGA) is compiled with ALtera program call [http://www.altera.com/products/software/sfw-index.jsp Quartus II].  A version of the code is availabe for download if you want to modify or develop new verilog code.  On this wiki, there is a set of videos introducing verilog code practice using examples from the verilog code in the HPSDR boards.
 
The verilog code for each of the Field Programmable Gate Arrays (FPGA) is compiled with ALtera program call [http://www.altera.com/products/software/sfw-index.jsp Quartus II].  A version of the code is availabe for download if you want to modify or develop new verilog code.  On this wiki, there is a set of videos introducing verilog code practice using examples from the verilog code in the HPSDR boards.
  
===Direct JTAG programming===
+
==Direct JTAG programming==
  
===Ozy's Firmware===
+
==Ozy's Firmware==
  
===Ozy as a USB JTAG programmer===
+
==Ozy as a USB JTAG programmer==
  
===Metis, Hermes, and Angelia Frimware===
+
==Metis, Hermes, and Angelia Frimware==
  
===Metis as an ethernet JTAG programmer===
+
==Metis as an ethernet JTAG programmer==
  
 
   
 
   

Revision as of 20:41, 31 December 2012

HPSDR Firmware Loading

The Current version of the Firmware can be found on the Downloads section of the website is Downloads

The verilog code for each of the Field Programmable Gate Arrays (FPGA) is compiled with ALtera program call Quartus II. A version of the code is availabe for download if you want to modify or develop new verilog code. On this wiki, there is a set of videos introducing verilog code practice using examples from the verilog code in the HPSDR boards.

Direct JTAG programming

Ozy's Firmware

Ozy as a USB JTAG programmer

Metis, Hermes, and Angelia Frimware

Metis as an ethernet JTAG programmer