PHOENIX- ISD/QSE Receiver/Transmitter Module
The Phoenix PCB contains a ISD (Integrating Sampling Detector) based HF Receiver, a QSE (Quadrature Sampling Exciter) based HF Exciter and a supporting synthesizer.
This image of a Phoenix Bird is emblazoned on 8 trams in Brisbane, Australia that were rebuilt and 'arose from the ashes' after the Paddington tram depot fire in 1962. The artist, Ken Howard, has released all rights to this drawing.
The project leader is Ray Anderson, WB6TPU
The Phoenix board is envisioned to contain a receiver, a transmitter and a synthesizer on a single HPSDR (High Performance software Defined Radio) plug-in module. One of the goals is to develop a board that will enable a user to get 'on the air' with a minimal amount of extra add-ons. Currently the plan is to realize the receiver as a QSD based device and the transmitter as a similar QSE. The local oscillator will be supplied by an on-board synthesizer with an onboard reference oscillator (but with provisions for accepting an external reference if desired).
Phoenix will leverage a lot of the lessons learned in SDR (Software Defined Radio) hardware from thoughout the SDR community, hence the name 'Phoenix'. It will be a re-birth of proven circuit concepts in the HPSDR format. The Phoenix board will be an alternative choice to Horton and Mercury as a means of implementing the RF receive and transmit functions. Compared to those projects it will be 'low-end' as far as complexity goes, but definitely not low-performance. Further details will be provided as they emerge....
Inital Block diagram for discussion:
The following diagram illustrates a concept where the AK5394a A/D is colocated on the same PCB physically adjacent to the ISD as suggested by Bob N4HY to minimize the spurious pickup between the ISD and the A/D: This approach has been discarded (i.e. having the AK5394a A/D on the Phoenix board. It makes more sense to utilize the full functionality of the Janus board)
The following diagram illustrates an alternate architecture proposed by Phil VK6APH where the output from the ISD is converted to a low impedance balanced signal for transport to the balanced inputs on the Janus board. This would have the advantage of minimizing the complexity on the Phoenix board by not requiring the majority of the Janus parts to reside on Phoenix. This is somewhat like the initial Phoenix concept. After further study it appears that this is the basic architecture that will be pursued for the Phoenix board.
Aug. 11, 2006The following simplified schematic illustrates the architecture being pursued. Details on front-end filtering, switching, the pre-amp and the LO synthesizer are not shown at this time. Many component values are not shown and those that are are subject to change.
Feature List for Discussion:
There have already been a number of good suggestions made on the reflector since this project was proposed related to various aspects of the design. The following is a list (in no particular order) of some of the suggested features/circuits:
Utilize AD9951 with a divide by 4 to generate quadrature LO signals Utilize 2 AD9951 with phase offset Microwave PLL divided down to HF
(as a general thing, suggestions are running towards avoiding 10-bit DDS circuits due to spurious considerations)
A robust high dynamic range low noise preamp has been suggested to precede the detector. Suggestions include:
Norton amplifier (noiseless feedback) amplifier using BFG591 Makhinson amplifier (push-pull version of Norton amp)
Switched BPF filters Broadband (0-30 MHz) frontend with external BPF
QSD: It is looking like either a 74auc2g53 with OPA1632 or LT1127 amps may end up being the ISD (integrating sampling detector).
The OPA1632 variant is being evaluated by Ahti OH2RZ and the LT1127 variant is being looked at by Phil N8VB.
This is a critical part of the circuit as far as overall performance is concerned.