Re: [Xylo-SDR] OpenCores.org

[Greg Overkamp <overkamp@yahoo.com>]

I have used the Opencores USB 1.1 core in a product
for my day job. It is working on the $99 Xilinx
Spartan 3 starter kit, with plenty of room to spare in
the FPGA. If using ADCs clocked at 48 MHz, USB 1.1 has
plenty of bandwidth to transfer two 24-bit channels to
the host (I and Q). USB 1.1 won't cut it if clocking
the ADCs at 192 KHz. The Opencores USB core is not
plug-n-play, however. There is not much of a user's
manual, and you will have to dig into a good USB book
and the USB spec in order to use it.

Greg
WD9DEX


On 12/13/05, Arthur J. Lekstutis <Artie@lekstutis.com>
wrote:
> I just found http://www.opencores.org/. Looks very
interesting.
>
> If the 'code' there is any good, it might be a
source of major
> components to an SDR FPGA project.
>
> Haven't looked closely yet, will look tonight...
>
> Later,
> Artie
>