Re: [Xylo-SDR] Clocks for USB FX2, TI PCM4202, etc.

["ecellison" <ecellison@comcast.net>]

Lyle

I don't think this is really stirring the pot. Just good design suggestions.
In any end product these are pretty much essential. They are required for
the project of building our spectrum analyzer. 

Er... I have not forgotten what your initial question was buried at the
bottom of one message.

WHAT ARE WE DOING? What IS the project?

We have had quite a number of conversations in a very short time. We pretty
obviously have the 'brain power' here in various areas of expertise. In my
opinion the Xylo which many have bought does jump us into project status.
Yet not necessarily be in the end product.

I arrived here from the Flex-Radio forum and an avid dedication to the
SDR-1000. Probably the reason for my support of the SDR-1000 is that it is
not a partially done project of boards. It is something I can buy and
actually use and get i/q signals out of. So whatever we do a working product
will springboard support further.

However, I don't think we can take a rifle shot at all the suggestions here
and hit the bullseye of a finished product.

Therefore it would be nice if the development system we might develop be of
sound design and also potentially be the end product(s).

IMHO what it should do is be a hardware project flexible enough to test
designs based around an FPGA with the I/O components (I2C, HS USB, LCD out
etc) that are on the Xylo/Saxo.

>From the standpoint of SDR-1000 projects are:

	Firmware upgradable 'sound card'
	Balanced Mic In. Pre-amp, Equalizer, power etc.
	Speaker Out. &(Keyer Sidetone)
	I/Q and control sigs using USB FIFO's to and from the PC.
	16 inputs 16 outputs or more for switches and knobs.
	LCD display.
	Paddle inputs (Keyer through USB)
	Accurate Frequency correction (per Bob) and the 200 mhz LO compared
to stable frequency source, Reflock II or other.

These are all projects mentioned before on the Flex-Radio forum and
reflector. There are probably more that I have forgotten, but initially I
called it the Universal Station Accessory. Actually since Phil - VK6APH
suggested it in a PIC design I called it the "AUS-USA".

Logically this would best be accomplished in a 'building' block hardware
design. GNU and Phil Covington are proceeding on that path.

My thoughts are to use a standardized high density buss structure perhaps
based on the PCI Express buss. Interconnecting the FPGA, each board, raw
power and ground supplies, I2C etc. That way the modular boards which we
might design can have one edge connected to the buss and another edge to
allow connections from the 'back panel' of an enclosure. Open enough in
design to allow experimental daughtercards at lesser expense than a single
board design, and open enough to allow other projects not expressed here.

Dunno!

Let's get some schematics for the TI chips from the brain trust here and get
something going toward copper. I think the Audio digitizing to and fro is a
good project start. Anyone want to take a shot at the buss suggestion?

Eric - AA4SW





	
	

 



-----Original Message-----
From: xylo-sdr-bounces@lists.ae5k.us [mailto:xylo-sdr-bounces@lists.ae5k.us]
On Behalf Of Lyle Johnson
Sent: Friday, December 16, 2005 1:48 AM
To: Xylo-SDR Discussion
Subject: Re: [Xylo-SDR] Clocks for USB FX2, TI PCM4202, etc.

Just to stir the pot...

1) Think about putting the default ADC and DAC on the main board with 
the FPGA.  Add connector for hooks to tie in external ones.  This will 
minimize RFI, of some importance if this is going inside a radio.

2) The ADC and DAC may have I2C or SPI, but that is just for control. 
Typically, there is a bit clock and frame sync signals, with frame sync 
in the 48 kHz to 192 kHz range and the bit clock typically 32 to 64 
times faster.  You can expect a 12.288 MHz bit clock in a 192 kHz sample 
rate system using the PCM4202, for example.  Harmonics of this can make 
interesting spurs and birdies, so you might want to keep the leads 
really short, which is a large part of the reason to put the ADC and DAC 
on the same board with the FPGA.

3) Consider putting the ADC buffer amplifier on the same board, and make 
it differential. Like the OPA1632 for the TI ADC.  This could be on a 
plug-in board, but then you are making a requirement to use the plug-in 
if you intend to use the ADC at all.

4) For ADCs of this caliber, think differential signaling.

5) If power consumption is a consideration, consider avoiding the 
Cyclone II or Spartan 3 or any of the 90 nm process FPGAs.  They are 
denser and cost a little less for given functionality, but the static 
current drain is dramatically higher than the older, 120 nm process 
parts.  If power consumption is not a consideration, then go for it and 
use the latest 90 nm process parts.

6) The analog section needs its own power supply regulators, well 
decoupled from the digital stuff.

7) You'll likely need negative voltage at several mA for the analog 
circuitry.  Avoid charge pumps such as those used in RS232 converter 
chips if RF noise is a concern.

73,

Lyle KK7P

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