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Re: [Xylo-SDR] USB 2.0 in Verilog
You need an external PHY with USB2 in FPGA... not really worth it...
use the FX2.
Phil N8VB
On 12/21/05, Leon Heller <leon.heller@bulldoghome.com> wrote:
> I was just looking through the Opencores stuff:
>
> http://www.opencores.org/
>
> and noticed a USB 2.0 core that someone is working on.
>
> Leon
> --
> Leon Heller, G1HSM
> leon.heller@bulldoghome.com
> http://www.geocities.com/leon_heller
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