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Re: [Xylo-SDR] Lionheart Block diagram v1.3



Folks

IMHO

In this exchange, everyone seems to be thinking existing projects. If the
front panel of the Lionheart has the room, I would suggest adding stuff that
is not in present plans. 

The reason we jumped the Xylo (at least me) is that it had a lot of options
VGA, I2C, JTAG, etc, and was simple to load and run programs. Perfect for
experimentation.

This board will have generic appeal outside ham radio just like the other
FPGA prototyping systems. If we can fit it on and it does not cost a million
bux, but just pin connections or a max 233. Jam it in. Even if it isn't
supported in current plans or code.

Eric


-----Original Message-----
From: xylo-sdr-bounces@lists.ae5k.us [mailto:xylo-sdr-bounces@lists.ae5k.us]
On Behalf Of Leon Heller
Sent: Friday, January 27, 2006 5:04 AM
To: Xylo-SDR Discussion
Subject: Re: [Xylo-SDR] Lionheart Block diagram v1.3

----- Original Message ----- 
From: <pvharman@arach.net.au>
To: "Xylo-SDR Discussion" <xylo-sdr@lists.ae5k.us>
Sent: Friday, January 27, 2006 5:52 AM
Subject: [Xylo-SDR] Lionheart Block diagram v1.3


> Lionheart V1.3 uploaded at
>
> http://www.hamsdr.com/dnld.aspx?id=117
>
> and GIF version at
>
> http://www.hamsdr.com/dnld.aspx?id=118
>
> Changes:
>
> - 1.2v regulator runs of +5v rail
> - JTAG goes into FPGA and out to bus
> - FPGA clock comes from 24MHz x 2 from FX2
> - removed 20 pins for BPF and LPF, will use I2C I/O chip on filter board
> - added MAX232 for RS232 comms port.

I don't thing we need the MAX232.

>
> Still lots of unanswered questions:
>
> 1. Do we put USB socket on board or use common PC MB header and 
> plug/socket
> 2. What plugs/sockets for 1pps/DDS clock/Control/RS232?  I suggest SMB for
> 1pps and DDS clock.
> 3. What goes to the DIN connector marked ?????

They could just be left as uncomittted FPGA I/Os.


73, Leon 

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