This weekend Bill, KD5TFD, completed his
integration of our Wolfson A/D + Xylo FPGA + USB interface into
PowerSDR.
This proof-of-concepth has been completely
successful and we are eagerly pushing forward to the next phase of the
project.
The screen shot below is of our 48k 16 bit
full duplex sound card running in PowerSDR using an SDR1000 on 20m
The noise floor of the Wolfson A/D in this
configuration is -140dBm in a 500z bandwidth. The next steps are to
increase the sampling rate to 192kHz and 24 bits.
Bill is also going to implement his system to
overcome the frequency error and drift of the 200MHz Valpey Fisher oscillator.
He is using a GPS 1Hz or 10kHz clock to measure the frequency of the DDS
output and pass this back over the same USB signal that carries the digital
audio. A software routine in PowerSDR will then compare the actual DDS
frequency to the desired frequency and make the necessary correction in
software. If this works OK then he will look at counting the 200MHz
oscillator directly, although picking this off the SDR1000 hardware is bit more
involved than the DDS output hence the reason for starting with the
DDS output.
We are looking at deriving an LVDS signal from the
200MHz oscillator and if anyone has any suggestions as to suitable connectors to
use with a single LVDS signal then we would appreciate the
information.
There is still plenty of room for more C++ and FPGA
developers if you are interested in assisting with the project - those willing
to lay out PCB's will be especially welcome!
73's Phil.... Vk6APH
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