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Re: [Xylo-SDR] [Flexradio] Proof-of-concept successful!



Chapter 7 of the USB 2 spec has this information in great detail. Twited pair cable impedence is nominal 90 ohms. Given the popularity of USB, surely here must be driver chips id LVDS can't do it directly.
 
 
    Chris - AE6VK
 


From: KD5NWA [mailto:kd5nwa@cox.net]
Sent: Tuesday, January 31, 2006 9:54 AM
To: Flex Radio
Cc: Xylo-SDR Discussion
Subject: Re: [Xylo-SDR] [Flexradio] Proof-of-concept successful!

LVDS is made for a tightly twisted pair with 100 Ohm impedance, a pair in a CAT5e cable is exactly what is meant to be used with. Does anyone know what the characteristic impedance of a USB cable is? If not, then it's best to stay away from anything unknown.

It's a transmission line from the transmitter to the receiver and should be treated as such including impedance matching so you do not get reflections, shortcuts will lead to phase noise.

As far as a connector, a CAT5e RJ45 connector is meant for that impedance, and does an excellent job.

At 11:30 AM 1/31/2006, Christopher T. Day wrote:
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Could you use standard USB cables with a type A connector on the end where you have room and a type mini-B on the end where you don't? USB is a single differential twisted pair with additional gnd and Vbuss wires rated to 420 Mbits/second. Be sure it's protected if someone accidentally plugs in a real USB at either end.
 
 
    Chris - AE6VK
 


From: Phil Harman [ mailto:pvharman@arach.net.au]
Sent: Sunday, January 29, 2006 12:31 AM
To: FlexRadio@flex-radio.biz; Xylo-SDR Discussion
Subject: [Xylo-SDR] Proof-of-concept successful!

This weekend Bill, KD5TFD, completed his integration of our  Wolfson A/D + Xylo FPGA + USB interface  into PowerSDR.
 
This proof-of-concepth has been completely successful  and we are eagerly pushing forward to the next phase of the project.
 
The screen shot below is of our  48k 16 bit full duplex sound card running in PowerSDR using an SDR1000 on 20m
 
http://www.hamsdr.com/dnld.aspx?id=126
 
The noise floor of the Wolfson A/D in this configuration is -140dBm in a 500z bandwidth.  The next steps are to increase the sampling rate to 192kHz and 24 bits.
 
Bill is also going to implement his system to overcome the frequency error and drift of the 200MHz Valpey Fisher oscillator. He is using a GPS 1Hz or 10kHz clock to measure the frequency of the DDS output and pass this back over the same USB signal that carries the digital audio.  A software routine in PowerSDR will then compare the actual DDS frequency to the desired frequency and make the necessary correction in software.  If this works OK then he will look at counting the 200MHz oscillator directly, although picking this off the SDR1000 hardware is bit more involved than the DDS output hence the reason for starting with the DDS output.
 
We are looking at deriving an LVDS signal from the 200MHz oscillator and if anyone has any suggestions as to suitable connectors to use with a single LVDS signal then we would appreciate the information.
 
There is still plenty of room for more C++ and FPGA developers if you are interested in assisting with the project - those willing to lay out PCB's will be especially welcome!
 
73's  Phil.... Vk6APH
 
 
 
 
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Cecil Bayona
KD5NWA
www.qrpradio.com

I fail to see why doing the same thing over and over and getting the same results every time is insanity: I've almost proved it isn't; only a few more tests now and I'm sure results will differ this time ...