But there is only one symbol - we're transporting a clock here => there
are no "data dependent" transients to be reflected. How can a mismatch
increase jitter?
Chris
-----Original Message-----
From: Ray Anderson [mailto:ray.anderson@xilinx.com]
Sent: Wednesday, February 01, 2006 2:00 PM
To: xylo-sdr@lists.ae5k.us
Cc: Ray Anderson
Subject: Re: [Xylo-SDR] [Flexradio] Proof-of-concept successful!
W6RMK wrote:
>So.. explain a mechanism where a fixed and stable mismatch will
introduce
>jitter or phase noise (other than by reducing system SNR).
>Jim, W6RMK
Jitter is divided into 2 predominant categories: RJ and DJ (Random
Jitter and Deterministic Jitter). Together these are usually called TJ
(Total Jitter)
RJ is stochastic by nature and is caused by random events (link noise
due to inadequate margins, oscillator noise etc.) The induced jitter is
unbounded and usually has a Gaussian distribution.
DJ is deterministic. It is composed of DDJ (data dependant jitter) and
PJ (Periodic Jitter). It's amplitude is unbounded.
In turn DDJ is composed of Inter Symbol Interference (ISI) and Periodic
Jitter (PJ).
So: TJ = (RJ + DJ) where DJ = (DDJ + PJ) and DDJ = (DCD + ISI)
Regarding ISI (Inter Symbol Interference): Depending on the exact
sequence of 1's and 0's the amount of induced jitter will be different
but predictable. Certain data patterns are much more problematic than
others. Duty Cycle Distortion (DCD) is usually though of as a deviation
from a perfect 50% duty cycle but which also includes unequal rise and
fall time issues. Periodic Jitter (PJ)is caused by periodic noise (hum,
crosstalk, etc) getting into the system.
ISI can be caused by several means, the most common are: Insufficient
bandwidth in the channel (group delay), high frequency losses in the
channel (dispersion), echoes or other undesirable features in the step
response of the channel. Read that last one as "reflections due to
impedance mismatches.
If you know the transfer function of the data path (characterized by
s-parameters) you can actually simulate the DDJ caused by a particular
data pattern.
So if there is a mismatch in a system (even if it is fixed and stable),
it can and will induce jitter in various amounts depending on the data
pattern transiting the system. DCD and ISI are a function of the data
pattern history. When edge transition density changes then DDJ is
generated.
People have devoted careers to studying this stuff. The details can get
incredibly complex. For a lot of good appnotes, whitepapers , tutorials
etc. on the subject check out the 'Technical Resources' section of
www.wavecrest.com . Understanding jitter effects has become a big
factor in high performance digital system design these days.
-Ray WB6TPU
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