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== Hermes - A DUC/DDC Transceiver ==
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''' Hermes - A DUC/DDC Transceiver '''
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'''  
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[[Image:Hardware_Block_Diagram_1_8.JPG|thumb|500px|Hardware block diagram. Click to enlarge.]]
 
Project Leader: Kevin M0KHZ
 
Project Leader: Kevin M0KHZ
  
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Following the outstanding success of Mercury and Penelope, and while investigating the verilog code for both, I had the insane idea of merging the verilog code of Mercury and Penelope into a single fpga! I played around with this idea for a while and the more I thought about it the more I liked the idea.
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====Update 11 July 2012====
  
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So here is the proposal, to develop a single board HPSDR based on the hardware of Mercury and Penelope and a single large fpga.
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Hermes is a single board Digital Up and Down Conversion (DUC/DDC) full duplex HF + 6m multi-mode transceiver.
  
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This board would have PC connectivity by USB. I’m planning to squeeze this all onto Euro Card sized PCB (100 x 160 mm), and if I utilize both sides I might even have room for a Pennywhistle type PA  :).  
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It is basically the [[MERCURY|Mercury]], [[PENNYLANE|Pennylane]], [[METIS|Metis]] and [[EXCALIBUR|Excalibur]] (less TCXO) boards rolled into one PCB. The board communicates to an associated PC via 100T/1000T Ethernet.
  
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Basic specs so far (nothing cast in stone)
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Hermes has the following features and facilities:
  
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*Fpga EP3C25Q240C or EP3C40Q240 (I think this is the largest without BGA pin out)
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* Continuous, uninterrupted, receive coverage from 10kHz to 55MHz.
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*Mercury receive chain
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* Supports Real-Time display of entire spectrum from 0-55MHz (with suitable PC software)
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*Penelope transmit chain, possible small change to gain distribution
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* Supports 7 fully independent receivers (sharing the same antenna - and with suitable PC software)
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*USB2 to PC data transfer
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* Each receiver can display 48/96/192kHz of spectrum
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*Pennywhistle PA (if there’s room)
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* Blocking Dynamic Range (ARRL Method) - no detectable gain compression below ADC overload
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*10Mhz ext an option
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* High performance receiver – same specifications as the HPSDR Mercury receiver (ie Dynamic Range typically 125dB)
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*Alex filter switching header
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* Transmit and receiver image rejection > 110dB
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*2.8W stereo audio PA
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* Full duplex operation, any split over entire 160m to 6m range.
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*13.5V supply
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* Transmitter two-tone 3rd order IMD of -50dBc on 20m @ 400mW output
 +
* 500mW RF output on 160 – 10m amateur bands, 350mW on 6m
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* Built-in high performance preamp, with a noise floor typically -135dBm in 500Hz
 +
* Software-selectable 31dB input attenuator in 1dB steps
 +
* FPGA code can be updated via the Industry Standard TCP/IP network Ethernet connection
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* Seven user-configurable open-collector outputs, independently selectable per band and Tx/Rx (for relay control, etc - with sequencing via PC code)
 +
* Separate open-collector PTT connection for amplifier control, etc, with sequencer
 +
* Microphone PTT jumper-selectable from tip or ring connection
 +
* Bias for electret microphones via jumper
 +
* Four user-configurable 12 bit analogue inputs (for ALC, SWR etc)
 +
* Three user-configurable digital inputs (for linear amplifier over temperature, etc)
 +
* Can operate from a 13.8v DC supply or +12v and +5v supplies
 +
* Jumper selected in-built low noise and high efficiency switch mode power supply designed by Kjell Karson,LA2NI – less than 600mA (receive - one receiver) from a 13.8V supply
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* I2C bus connector for control of external equipment
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* Full QSK operation (performance dependant on associated PC and control software)
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* Low-level transmitter output for transverter use via user-selectable output attenuator
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* Stereo audio outputs at line and headphone levels
 +
* In-built 1W stereo audio amplifier for directly driving speakers
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* Direct, de-bounced connections for a Morse key (straight or iambic) and PTT
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* Low phase noise (-140dBc/Hz @ 1kHz at 14MHz) 122.88MHz master clock,which can be phase-locked to an internal 10MHz TCXO or external frequency reference
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* Direct ribbon cable interface to [[Apollo]] 15W power amplifier, low pass filters and automatic ATU or ANAN-10 10W power amplifier and low power filters [http://www.apache-labs.com http://www.apache-labs.com]
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* Industry Standard TCP/IP network Ethernet interface supports static, APIPA or DHCP IP address
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* Hermes responds to ping and ARP requests and auto senses network connection speed
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* PCB is 160mm x 120mm, 8 layers
  
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Following the tradition of the HPSDR naming convention, I thought Hermes was appropriate as he was known for his invention and theft!
 
  
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Hardware block diagram:
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[[Apollo]] is a combined 15w PA, Low Pass Filter bank and Automatic ATU. The Apollo project is led by Kjell Karlsen LA2NI.
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http://openhpsdr.org/wiki/index.php?title=Image:Hardware_Block_Diagram_V1_5.jpg
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Hermes can be used as a Vector Network Analyzer: [[VNA]]
  
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Current status ( 20 April 09 ), Project proposal open for comment. Looking to nail ‘major’ hardware decisions by the end of the month. Initial draft schematics will then be produced and placed here on the Wiki for comment.
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[[Image:hermesapolloincase.jpg|thumb|500px|Hermes and Apollo in enclosure - photo copyright Kjell Karlsen 2010.]]
  
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Kevin – M0KHZ
 
  
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See attached photo of an enclosure I intend to use for the prototype, the euro card will slide in, regulators and PA transistors will be bolted directly to the case and there is plenty of room for additional hardware (LPF's, Beagleboard??? - who knows :))
 
  
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http://openhpsdr.org/wiki/index.php?title=Image:P1010663.JPG
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====Update 7 August 2011====
  
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The primary PCB layout team member of Hermes, Abhi has a blog on Hermes at [http://hpsdrhermes.blogspot.com/ http://hpsdrhermes.blogspot.com/ ]. --[[User:KV0S|KV0S, Dave]]
  
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====Update ( 28 April 09 )====
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====Update 7 July 2011====
  
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Since the announcement of the Hermes project there has been quiet a bit of traffic ‘in the background’, in summary the hardware details are now reasonably stable. What follows are some snippets of traffic to provide readers with some insight to the development process ......
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A prototype board has been built and tested. The board is fully functional and meets or exceeds the performance of the Mercury/Penelope/Metis/Excalibur boards the design is based on.
  
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Phil VK6APH has provided several suggestions, namely:
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Some minor board layout issues are currently being addressed and a pre-production layout is presently being prepared.
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The KD5TFD and W5WC versions of PowerSDR(TM) as well as KISS Konsole have been modified to provide native Hermes support.
  
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''There needs to be an audio out from the TLV320.
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Ken, N9VV, has a lot of information regarding Hermes on his web site here  http://www.n9vv.com/hamradio.html
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JTAG - the JTAG programming can come from the FX2, perhaps we have a
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standard JTAG header and jumpers to connect the relevant pins on the FX2
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so we can use either?
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Need to show the LPF at the RF input.
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We could take the forward power from the 15w PA as well since I think
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there are enough spare inputs to read all we need.
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ICD header needs to connect to ADC78H90.
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If there are spare inputs should we bring them out - perhaps for use with an external amplifier etc?
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122.88MHz clock directly feeds DAC.
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Phil is also trying to find a packaged LPF so we can get rid of the toroids on
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the DAC output.
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Add a header for I2C signals from the FX2 to control external equipment.''
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Graham KE9H has made an interesting suggestion regarding the gain distribution of the existing Penelope 1/2 W PA strip :
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[[Image:Hermes.jpg|thumb|500px|center| (click for larger image) photo courtesy Abhi Arunoday ]]
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There are also the [[Hermes Board Build Notes]]
  
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''As far as the gain re-distribution to get the transmit frequency response flat out to
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====Update 2 December 2012====
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50 MHz, you basically change the transformer T3 from a TC4-1T to a TC1-1T
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(which will maximize linearity of the AD9744,) and add a second OPA2674
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in series with the current OPA2674 OpAmp, and redistribute the gain between them.
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The current OPA2674 is being run at 24 dB gain, and is hitting gain-bandwidth
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limits around 30 MHz. With two in series, they would each be set for around
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12 dB gain, and the combination should be flat well over 60 MHz.''
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Graham is also investigating the use of a THS6012 as a substitute PA, this provided a very clean output, at a higher level, a test board has been drafted and a few boards have been ordered to enable to testing. I’m not sure this chip will form part of Hermes as the supply requirements are beyond the current spec, but I guess the final decision will be made once the test results are in :)
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A useful website for Hermes users can be found at [http://www.k9ivb.net/hermes/ www.k9ivb.net/hermes/] by Dick K9IVB.  --[[User:KV0S|KV0S, Dave]]
  
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While I’m discussing the PA strip, I must reiterate that the PennyWhistle PA is really just a dream for Hermes, I really don’t think there will be enough room on the board, however I will squeeze everything one first, and if there is room, PennyWhistle will be considered.
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There are the [[Hermes Board Build Notes]] as well.
  
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Graham has also suggested some form of audio PA be included, this has now been added to the hardware block diagram.
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[[Category:Hermes| ]]
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Scotty WA2DFI, has made several suggestions and between us we have now settled on some of the connecting hardware. To save board edge space a number of the connectors are now ‘stack’ connectors. Scotty has also made a good start on the schematics, I’m not going to provide a guesstimate for release for comment, mainly due to Scotties Dayton commitments, but it’s going to be weeks not months :)
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Phil N8VB has provided some valuable information, namely:
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''Take a look at how I connect the FX2 to the FPGA using port E for 8 bit parallel configuration.  After configuration I use this as the 8 bit communications bus between the FX2 and the FPGA.  This allows faster configuration of the FPGA and faster read/writing to the registers in the FPGA (especially for tuning word).  You might want to use this scheme in Hermes.
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Also, instead of using an Altera configuration device (especially for the larger '40 Cyclone III), consider using a SD card which can have a serial interface to the FX2.  The FX2 can read the SD card and configure the FPGA via the parallel mode mentioned above.''
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Phil’s advice regarding the use of port E will be incorporated in Hermes. The move to an SD card is still in the balance as board real-estate is of a premium and I don’t understand / can’t see any benefits for the change? Can someone out there enlighten me?
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Phil N8VB, has also enlightened me on capability of the FX2 (although I’ve had to delve into the technical reference and ‘Google’ to ‘partially’ understand USB end points):
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''The FX2 has 4 high speed endpoints.  This is enough for full duplex operation of the receiver and transmitter via USB.''
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The current command and control scheme will need to be restructured to achieve this and is well worth pursuing.
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Well I guess that pretty well brings everyone up to date with the Hermes story so far, so in summary, the hardware is close to being finalized, Scotty has made a start on the schematics, and I’m climbing the learning curve of OrCAD, in preparation to layout the board :)
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Kevin - M0KHZ
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Latest revision as of 04:50, 28 December 2012

Hermes - A DUC/DDC Transceiver

Hardware block diagram. Click to enlarge.

Project Leader: Kevin M0KHZ

Update 11 July 2012

Hermes is a single board Digital Up and Down Conversion (DUC/DDC) full duplex HF + 6m multi-mode transceiver.

It is basically the Mercury, Pennylane, Metis and Excalibur (less TCXO) boards rolled into one PCB. The board communicates to an associated PC via 100T/1000T Ethernet.

Hermes has the following features and facilities:

  • Continuous, uninterrupted, receive coverage from 10kHz to 55MHz.
  • Supports Real-Time display of entire spectrum from 0-55MHz (with suitable PC software)
  • Supports 7 fully independent receivers (sharing the same antenna - and with suitable PC software)
  • Each receiver can display 48/96/192kHz of spectrum
  • Blocking Dynamic Range (ARRL Method) - no detectable gain compression below ADC overload
  • High performance receiver – same specifications as the HPSDR Mercury receiver (ie Dynamic Range typically 125dB)
  • Transmit and receiver image rejection > 110dB
  • Full duplex operation, any split over entire 160m to 6m range.
  • Transmitter two-tone 3rd order IMD of -50dBc on 20m @ 400mW output
  • 500mW RF output on 160 – 10m amateur bands, 350mW on 6m
  • Built-in high performance preamp, with a noise floor typically -135dBm in 500Hz
  • Software-selectable 31dB input attenuator in 1dB steps
  • FPGA code can be updated via the Industry Standard TCP/IP network Ethernet connection
  • Seven user-configurable open-collector outputs, independently selectable per band and Tx/Rx (for relay control, etc - with sequencing via PC code)
  • Separate open-collector PTT connection for amplifier control, etc, with sequencer
  • Microphone PTT jumper-selectable from tip or ring connection
  • Bias for electret microphones via jumper
  • Four user-configurable 12 bit analogue inputs (for ALC, SWR etc)
  • Three user-configurable digital inputs (for linear amplifier over temperature, etc)
  • Can operate from a 13.8v DC supply or +12v and +5v supplies
  • Jumper selected in-built low noise and high efficiency switch mode power supply designed by Kjell Karson,LA2NI – less than 600mA (receive - one receiver) from a 13.8V supply
  • I2C bus connector for control of external equipment
  • Full QSK operation (performance dependant on associated PC and control software)
  • Low-level transmitter output for transverter use via user-selectable output attenuator
  • Stereo audio outputs at line and headphone levels
  • In-built 1W stereo audio amplifier for directly driving speakers
  • Direct, de-bounced connections for a Morse key (straight or iambic) and PTT
  • Low phase noise (-140dBc/Hz @ 1kHz at 14MHz) 122.88MHz master clock,which can be phase-locked to an internal 10MHz TCXO or external frequency reference
  • Direct ribbon cable interface to Apollo 15W power amplifier, low pass filters and automatic ATU or ANAN-10 10W power amplifier and low power filters http://www.apache-labs.com
  • Industry Standard TCP/IP network Ethernet interface supports static, APIPA or DHCP IP address
  • Hermes responds to ping and ARP requests and auto senses network connection speed
  • PCB is 160mm x 120mm, 8 layers


Apollo is a combined 15w PA, Low Pass Filter bank and Automatic ATU. The Apollo project is led by Kjell Karlsen LA2NI.


Hermes can be used as a Vector Network Analyzer: VNA

Hermes and Apollo in enclosure - photo copyright Kjell Karlsen 2010.


Update 7 August 2011

The primary PCB layout team member of Hermes, Abhi has a blog on Hermes at http://hpsdrhermes.blogspot.com/ . --KV0S, Dave

Update 7 July 2011

A prototype board has been built and tested. The board is fully functional and meets or exceeds the performance of the Mercury/Penelope/Metis/Excalibur boards the design is based on.

Some minor board layout issues are currently being addressed and a pre-production layout is presently being prepared. The KD5TFD and W5WC versions of PowerSDR(TM) as well as KISS Konsole have been modified to provide native Hermes support.

Ken, N9VV, has a lot of information regarding Hermes on his web site here http://www.n9vv.com/hamradio.html

(click for larger image) photo courtesy Abhi Arunoday

There are also the Hermes Board Build Notes

Update 2 December 2012

A useful website for Hermes users can be found at www.k9ivb.net/hermes/ by Dick K9IVB. --KV0S, Dave

There are the Hermes Board Build Notes as well.

Retrieved from "https://openhpsdr.org/wiki/index.php?title=HERMES&oldid=4473"