SASQUATCH
SASQUATCH - DSP back-end
The project leader for the board is Lyle Johnson, KK7P
The Sasquatch board is a hardware DSP back-end intended for use by constructors who would like to operate the HPSDR stand-alone rather than attached to a PC -- redefining the HP in HPSDR to mean "Highly Portable." The board may even allow real "knobs" and "buttons" to be attached rather that the "soft" controls of a PC based SDR, although such control and interface functions more properly belong on a board dedicated to these kinds of tasks.
Current Status
The board, presently in the planning phase, has the following features:
- TI TMS320C6726 32-bit Floating Point DSP [1] - FPGA - Flash Memory for self-booting - Connector for JTAG-based emulator - Analog & digital I/O - Power consumption should be under 3 watts
(From Lyle KK7P:) Sasquatch initially will use an Actel A3P1000 Flash-based ProASIC3-series FPGA. http://www.actel.com/products/pa3/ Not merely to be different -- I'd normally use an Altera Cyclone II or III series part for consistency with the rest of the project -- but because the board is really a prototyping/development board for the AMSAT http://www.amsat.org Software Defined Transponder (SDX). In space, RAM-based FPGAs, like those produced by Altera, have to be constantly monitored to prevent single-event upsets (SEU) from reconfiguring the logic. Flash based parts are not nearly as susceptible.
The AMSAT board would normally be "hosted" by a CAN (controller area network) control module http://can-do.moraco.info/ which also supplies power. For the ATLAS case, we merely install a DIN connector instead of the CAN module.
It will initially incorporate features that are designed especially for operation in the space environment, like an error detection and correction (EDAC) memory system, and dual Flash chips for booting.
Still, I hope it will be an interesting and very capable board, and one which can be used for learning, which is really what this is all about.
And it still might be Altera FPGA based and not have EDAC memory. A strictly HPSDR version. Depends on the workload and the effort to convert the logic between device families.
Sasquatch will have the logic needed to implement a highly efficient VHF transmitter using envelope elimination and restoration techniques. There is still some RF stuff required, of course, which is intended to hang off of some expansion headers, at least in the AMSAT version. This can be adapted for HF and other work.
Required Reading for EER/HELAPS:
HELAPS article from AMSAT Eagle Pedia http://www.amsat.org/amsat-new/eagle/EaglePedia/index.php/Image:HELAPS_D_considerations.pdf
2401 MHz HELAPS transmitter block diagram http://www.amsat.org/amsat-new/eagle/EaglePedia/index.php/Image:HELAPS_D_preliminary_block_diagram_-_N2UO.pdf
RF Power Amplifiers, Mihai Albulet, Noble Publishing, ISBN 1-884932-12-6 http://hpsdr.org/wiki/index.php?title=Special:Booksources&isbn=1884932126
RF Power Amplifiers for Wireless Communications, Steve Cripps, Artech House, ISBN 0-89006-989-1 http://hpsdr.org/wiki/index.php?title=Special:Booksources&isbn=0890069891
Advanced Techniques in RF Power Amplifier Design, Steve Cripps, Artech House, ISBN 1-58053-282-9 http://hpsdr.org/wiki/index.php?title=Special:Booksources&isbn=1580532829
Watch this space...
