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HPSDR Firmware Loading

The Current version of the Firmware can be found on the Downloads section of the website is Downloads

The verilog code for each of the Field Programmable Gate Arrays (FPGA) is compiled with ALtera program call Quartus II. A version of the code is availabe for download if you want to modify or develop new verilog code. On this wiki, there is a set of videos introducing verilog code practice using examples from the verilog code in the HPSDR boards.

Direct JTAG programming

Quartus II

Parallel Port Bitblaster

USB Bitblaster

Ethernet Bitblaster

Ozy or Magisters's Firmware

Loaded by Radio Software

Ozy or Magister as a USB JTAG programmer

Ozy JTAG Blaster

Metis, Hermes, and Angelia Frimware

Metis as an ethernet JTAG programmer