[Xylo-SDR] Reference Counter Progress

[Bill Tracey <bill@ewjt.com>]

I've got reference counter code going on the Xylo now -- this allows one to 
count a clock against a reference clock, such as a 1pps or 10 Khz GPS 
derived clock.  Code is in SVN in kd5tfd/RefCounter.   Currently the code 
is setup to write to  the USB FIFO  and sends an 8 byte packet each time 
the reference clock fires.  The format of the data is:

2 byte flag  - 0xffffffff
2 byte serial number - incremented each time a count is sent
4 byte counter value

All of the data is sent BigEndian style (most significant byte is sent on 
the wire first)

Code is structured as five modules:
RefCounter  - top level module that glues things together
RefCount -- counts the signal
CounterToFIFO - takes data from RefCount, Frames it and dumps it into a FIFO
dc_fifo - Dual clocked FIFO between CounterToFIFO and USBPipe -- buffers 
data going into the FX2  -- this is a Quartus megafunction
usb_pipe - takes data out of the dc_fifo and feeds it to the FX2 fifo to 
the PC

I don't think the FIFO is actually necessary in this setup, but I suspect 
it will be when we try and multiplex multiple streams (audio data, control, 
other counters) into the USB pipe, so set it up with the counter and the 
FX2 FIFO decoupled.

I am seeing some frames dropped from time to time (big jump in serial 
number received @ the PC, on the order of dozens), need to run down what's 
happening there.   Seems fine counting  the 25 MHz FX2 clock - will have to 
scrounge up some faster clocks to see how fast it can go.

Next steps for me on this is to modify an SDR 1000 to tap the QSD clock sig 
and see how it does counting that.   Ultimately will have to integrate this 
with some of the AD code, and look into some more generic multiplexing 
scheme for putting frames in the USB pipe.

Cheers,

Bill