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Re: [Xylo-SDR] FPGA pin names in schematic
Would it be too late to add one more tiny feature?
A I/O pin from the FPGA to a emitter follower with the output
connected to a SNA female connector close to the front of the card,
why? If in the future we implement a Digital DDS on the FPGA you
don't want it coming out the bus, it will radiate too much.
Kind of late, but better late than never.
At 11:52 PM 1/19/2006, you wrote:
Now that I'm about to start connecting the FPGA to the connector etc. it
would make sense to add net names to the FPGA I/O pins so that the Pulsonix
PCB software will automagically connect them to the bus I've created in the
schematic. I was thinking of simply using the pin number, like IO_23. Has
anyone got a better suggestion?
Leon Heller, G1HSM
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