Re: [Xylo-SDR] FPGA pin names in schematic

["Leon Heller" <leon.heller@bulldoghome.com>]

----- Original Message ----- 
From: "KD5NWA" <kd5nwa@cox.net>
To: "Xylo-SDR Discussion" <xylo-sdr@lists.ae5k.us>
Sent: Friday, January 20, 2006 6:14 AM
Subject: Re: [Xylo-SDR] FPGA pin names in schematic


> Would it be too late to add one more tiny feature?
>
> A I/O pin from the FPGA to a emitter follower with the output
> connected to a SNA female connector close to  the front of the card,
> why? If in the future we implement a Digital DDS on the FPGA you
> don't want it coming out the bus, it will radiate too much.
>
> Kind of late, but better late than never.

That's OK. I don't mind changing things until the files are sent off. Even 
after that if they haven't started processing the job.

Won't it be a lot more than one pin? What about the DAC and filter?

Leon