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Re: [Xylo-SDR] FPGA pin names in schematic
Phil has been looking at that, maybe he can tell us what he thinking on
I think you need a DAC and a elliptical filter. you may want to look at
the DDS-60 board, it has all the components all figured out for the
filter and amplifier, except the DAC part
Phil Harman, or anybody please chime in so Leon can put it in before
making a prototype.
We have been discussing how to make a cleaner DDS, and it requires a high
precision Sine table with as many as 32K to 64K entries. If we use the
internal RAM to hold those values, it being very fast, we might need RAM
on the outside for use in buffers, etc. By the way, how wide is the RAM
that you have put in? A lot of the boards that have RAM have one chip
that is 16 bits wide, so every 10 ns you can pull out a 16 bit precision
number to feed the DAC or FX2. If the internal RAM is not big enough then
we are going to need to use the external RAM and it needs to be 16 bit
wide to minimize the number of fetches.
This where a second precision optional clock device besides the 24.4xx
MHz comes in feeding a clock input pin, you want the DDS STATE clock as
high as the RAM will tolerate, if we use internal RAM for the Sine table,
our clock could be in the 200MHz range, which would give better
resolution and lower spurs.
We really need to get together on TeamSpeak to make sure we are
not leaving something critical out of the board. >:-}
Of course all of these components are optional and you populate the board
with them if needed only.
At 03:52 AM 1/20/2006, you wrote:
----- Original Message -----
From: "KD5NWA" <email@example.com>
To: "Xylo-SDR Discussion" <firstname.lastname@example.org>
Sent: Friday, January 20, 2006 6:14 AM
Subject: Re: [Xylo-SDR] FPGA pin names in schematic
> Would it be too late to add one more tiny feature?
> A I/O pin from the FPGA to a emitter follower with the output
> connected to a SNA female connector close to the front of the
> why? If in the future we implement a Digital DDS on the FPGA
> don't want it coming out the bus, it will radiate too much.
> Kind of late, but better late than never.
That's OK. I don't mind changing things until the files are sent off.
after that if they haven't started processing the job.
Won't it be a lot more than one pin? What about the DAC and
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