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Re: [Xylo-SDR] Architecture review
Cheating? Who made that decision? It must be a DSP chip salesman? :-P
At 08:32 PM 1/21/2006, you wrote:
> A FPGA can make a DSP look like a sick puppy, that is one reason I
> recently bought a Spartan 3 1000K board, 24 multipliers in hardware
> built in. I looked for examples and found a 4096 point FFT using
> floating point in 7.6 microseconds, is that fast enough? We would not
> need it anywhere that fast so we could cut back on the hardware usage.
FPGA-based DSP is useful for certain applications where lots of speed is
needed for a straightforward algorithm, like the FFT you cite.
Real-time video filters, etc., are fertile ground for FPGA-based DSP.
But it is very difficult to fit into the same FPGA -- running at the
same time -- a denoiser, adjustable filters for SSB and CW, a Tx
equalizer, impulse noise blanker, SAM tracking demodulator...
A general-purpose DSP is useful for applications that require a bit less
raw horsepower but great flexibility in the algorithms being performed.
A good example is the SDR-1000. The DSP being done in the code running
on the PC would likely be be a nightmare in an FPGA, unless you created
a "soft" programmable DSP inside the FPGA, but that's cheating...
I create designs with DSPs and FPGAs, and use both extensively. Each
has its place -- I want to be sure there is a place in the "not Xylo no
acronyms sorta universal widget box" being discussed, even if that place
is never occupied :-)
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"I fail to see why doing the same thing over and over and getting the
same results every time is insanity: I've almost proved it isn't;
only a few more tests now and I'm sure results will differ this time ... "