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Re: [Xylo-SDR] RFC - Motherboard
On 1/24/06, Leon Heller <firstname.lastname@example.org> wrote:
> PCI isn't relevant, it uses very tricky stuff involving reflections on the
> bus. This means that the the lengths of track from the interface to the
> connector have to be the correct length. PLX who make generic PCI interfaces
> probably have details on board design on their web site.
> If the bus is terminated properly, as I said the other day, it should be OK
> for our purposes.
A method that I have used in the past with success is to make the
motherboard 4 layers. The top layer is a ground plane, the bottom
layer is the +5V plane, and the middle two layers are used for bus
trace routing. If the +5V plane is bypassed properly it is basically
at ground potential as far as RF is concerned. The top and bottom
layers then act as a shield with the signals sandwiched in between.