Re: [Xylo-SDR] Janus board block diagram

[pvharman@arach.net.au]

Looks like the HTML file did not make it through the system.  Attached is a 
GIF that should get throught OK.

I see that sending attachments causes problems - where should we send such 
diagrams in the future?

Phil...VK6APH 

Quoting Phil Harman <pvharman@arach.net.au>:

> All,
> 
> 
> 
> Attached is my V1.0  block diagram of the A/D and D/A board in both Visio 
> and HTML format. I've called this "Janus" after the Roman god of gates and 
> doors (ianua), beginnings and endings, who could see both ways at once ( 
> input and outputs :)  ).
> 
> 
> 
> I've drawn the block diagram for the Wolfson A/D but it much the same for 
> the others. The PCM4202 is does not have an I2C interface to set it up so we
> 
> either uses jumpers, FPGA pins or an I2C I/O port etc.
> 
> 
> 
> A few questions:
> 
> 
> 
> Should we use the TLV320's 30mW audio amplifiers instead of the PWM A/D'S 
> for our audio output?  That way you could connnect a pair of headphones 
> directly to the card.  Disadvantage is that we are then relient on the TI 
> chip in the future.
> 
> 
> 
> Given that D/A's are very easy to implement in the FPGA should we add a few 
> more for control of external equipment e.g. an external linear amplifier?
> 
> 
> 
> The TLV320  needs to run at (24.576/2)MHz  - should we derive this from the 
> FPGA or add a divide by 2 to the board so this clock does not need to pass 
> back over the back plane?
> 
> 
> 
> Where should the audio connectors be located and what style should we use 
> and/or should the signals be routed back over the backplane?
> 
> 
> 
> Regards
> 
> 
> 
> Phil... VK6APH
> 
> 
> 
> 
> 
> 
> 
> 
> 
>