[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Xylo-SDR] RFC - Motherboard



On 1/24/06, Eric Ellison <ecellison@comcast.net> wrote:

> The buss stuff really all
> started to unravel when Phil_C said he needed an FPGA on the Radio board due
> to the probable lack of capability of the buss to carry the A/D and other
> high speed sigs to and from the Lionheart. Bill – KD5TFD and I sort of said
> the same thing Saturday:  "If we can't leverage the Lionheart for all buss
> mounted FPGA projects now and in the future, what is the point of the buss?"
>

Gosh, this is really getting tiring...  Really, please get away from
the idea that a FPGA or CPLD is some special kind of magic thing... It
is just a chip that can replace a board full of other logic chips.  
People don't think twice when we are using the Wolfson/TI ADC and
another TI ADC/DAC on the same board.  And people happily put two
Analog Devices DDS chips on a board to get a quadrature LO...  But God
forbid if I mention using more than one FPGA ;-)

> Cecil suggested a .100 pin header  to which we would attach a twisted pair
> to a single pair block going from board to board. It is a good idea for a
> couple of pairs of pins, but if we need 16 pair or probably more, it is a
> little impractical, but do-able.

We only need a couple of high speed lines, not 16.

Phil C