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Re: [Xylo-SDR] RFC - Motherboard

----- Original Message -----
Sent: Wednesday, January 25, 2006 2:10 AM
Subject: Re: [Xylo-SDR] RFC - Motherboard



Well now we are at the point of our Saturday discussion. How fast? How Clean, How Many? None of us knew, and we still don?t. Cecil did know and all of you have pointed to the solution - lvds. The buss stuff really all started to unravel when Phil_C said he needed an FPGA on the Radio board due to the probable lack of capability of the buss to carry the A/D and other high speed sigs to and from the Lionheart. Bill ? KD5TFD and I sort of said the same thing Saturday:  ?If we can?t leverage the Lionheart for all buss mounted FPGA projects now and in the future, what is the point of the buss?? It would be nice to see any pin pair be able to pass any frequency quietly. If it?s not possible then it?s not possible. Also according to Cecil, an FPGA interfaced to an FPGA can do lvds without any additional components but we still need twisted pair, or coax.


Cecil suggested a .100 pin header  to which we would attach a twisted pair to a single pair block going from board to board. It is a good idea for a couple of pairs of pins, but if we need 16 pair or probably more, it is a little impractical, but do-able.


I made a couple of suggestions for mass termination or even a ?flexible buss? using twisted pair IDC cable which didn?t garner any comments. This stuff does have flats and twists so also may be impractical.


That Nat Semi page I mentioned has suitable backplane drivers.


73, Leon