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Re: [Xylo-SDR] RFC - Motherboard
1) Each board must be addressable from the Janus board via I2C or maybe
JTAG in order for the Janus to do the firmware download to each FPGA.
I think the motherboard/bus should directly and distinctly support JTAG,
in which some signals are in parallel, some are daisy-chained. There
may well be a mix of JTAG devices, not only FPGAs, on the various boards
-- including daughter boards.