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Re: [Xylo-SDR] Lionheart Block diagram v1.2



----- Original Message ----- From: <pvharman@arach.net.au>
To: <vk4str@netspace.net.au>; "Xylo-SDR Discussion" <xylo-sdr@lists.ae5k.us>
Sent: Friday, January 27, 2006 1:41 AM
Subject: Re: [Xylo-SDR] Lionheart Block diagram v1.2


Hi Helmut,

Adding serial ports to the FPGA is very easy, I already have one on my Xylo to
help with debugging.

Based on current feedback I will make the following changes to the V1.2
Lionheart block diagram

1. 1.2v regulator to run off the 5v rail.
2. Use I2C for controlling the LPF's and BPF's. Last night I tested an
MCP23016 16 bit I/O expander on my Xylo and it works just fine.
3. I think that I understand how the JTAG boundary scan works now so I will change the diagram to show the connector going into the FPGA and from the FPGA
out over the bus.

In regards to the question below, what version of the FX2 are we planning i.e.
how many pins?

I was intending to use the 56 pin version.

Leon