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Re: [Xylo-SDR] Fundamental Atlas design decisions
Ray
I think this stack as shown is the best. The board will probably be mounted
on hard standoffs at each connector at the proper distance from the mounting
surface. The mounting surface will undoubtedly be at ground poetential and
provide for the safety/short/emi perspectives. The Atlas board, in itself
could become a 'product' that someone could sell, and versatility is the
key. (reasonable cost would be nice!)
2. Since you are the volunteer and 'principle designer' (smile), 'call the
ball' on thickness (can be anything you want in standard thickness).
3. Since Janus and Lionheart are still in the block development and
prototyping stages I think 'best practice' as you see it should not be a
problem as they actually get to board layout. My question to them is: Should
the buss dictate board design or visa versa? Personally, I think we should
design the buss reasonably knowing what we want to do, and make the cards
conform.
4. I think I know what you mean, but am lost in acronyms. Make it what you
think we need.
5. Yes, I suggest SIP sockets and standard resistor packs for termination,
and optinal power jumper for active/passive, but I am talking out of my
league. Also where to place the sockets in relation to the end of the board
can be a problem.
Good Stuff Man!
Thanks
Eric
-----Original Message-----
From: xylo-sdr-bounces@lists.ae5k.us [mailto:xylo-sdr-bounces@lists.ae5k.us]
On Behalf Of Ray Anderson
Sent: Tuesday, February 21, 2006 12:45 PM
To: xylo-sdr@lists.ae5k.us
Cc: Ray Anderson
Subject: [Xylo-SDR] Fundamental Atlas design decisions
A few thoughts regarding the Atlas design:
1) Here is one possible stackup which keeps the LVDS signal on a
separate layer from the other signals (audio, clock, JTAG, I2C, other
TTL/CMOS signals/control, etc.). I'm showing the PWR layer on the
outside, but it could be swapped with the GND layer. Having GND on the
outside may be a bit better from a safety/shorting/EMI perspective, but
having it between the LVDS and signal layer is probably better from a SI
perspective since the reference path for the clock and others won't be
as dependent on the goodness of the decoupling.
------------------------- PWR
------------------------- LVDS (100 ohm differential)
------------------------- GND
------------------------- Other Signals
2) We need to decide on a substrate thickness for the stackup. If we go
for a total typical thickness of .062 (which will provide good
mechanical rigidity for the backplane) then the dielectric layers will
be about 18 mils which is reasonable. This decision will dictate the
width and spacing of the LVDS conductors that need to have a 100 ohm
differential impedance.
3) Designers of the Janus and Lionheart boards should endeavor to keep
the LVDS driver/receivers as close as possible to the connector as
possible in order to minimize stub lengths (important in a point to
multipoint system).
4) We'll need to optimize the signal to ground ratio for the LVDS
connector pinout to minimize SSO problems.
5) Backplane decoupling is important as is buss termination. If the
design were to only support Lionheart and Janus then termination would
only be required on those boards and the backplane would be
'transparent'. However since we will have a minimum of 4 slots then
backplane termination is required. If the add on 'buss extenders' as
envisioned by Eric materialize we will need to make provisions to
turn-off the backplane termination scheme and move it out to the
extenders.
There are lots of other issues to be dealt with, but these are some
basic but important ones that will effect the viability of the whole
design.
Ray WB6TPU
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