[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Xylo-SDR] Fundamental Atlas design decisions

On 2/22/06, Ray Anderson <ray.anderson@xilinx.com> wrote:

> Do you intend on having a FPGA on the Mercury board to convert the
> LTC2208 LVDS/CMOS parallel data to I2S ?
> - Ray   WB6TPU

Yes, the on board FPGA will do the downconversion to <= 250 kSPS and
serializing to I2S to keep things compatible with the Janus board.  I
will probably design in space for a Cypress FX2 for USB 2.0 that can
be populated on the board to bypass the bus for high speed output (>
1MSPS) and for stand alone applications/testing.

73 de Phil C