Been an very productive week. Managed to get the I2C running so we can configure the Wolfson and TLV320 from the PC over the USB. This means that when this gets added to PowerSDR we can configure, and alter, the various A/D, D/A and peripheral chips from within PowerSDR etc.
Bill wrote some Verilog code that enables us to use the D/A converters within the TLV320. I included this in the current code and we can now use both the Line out and headphone out from the TLV. I connected my headphones to the TLV and the output sounds great!
I've also completed the Verilog code to send 2 x full duplex signals to PowerSDR. At the moment we have 48k 24 bit Audio in, 48k 16bit microphone/Line in and 48k 16 bit audio out and 48k 16 bit I/Q out.
Once Bill has incorporated this into PowerSDR we will release V1.0 of the Janus code.
I've also posted a draft of the protocol we are using over the USB for comment
You will find a preliminary circuit diagrams for the Janus board here.
The board can either connect to the Atlas backplane or a Xylo/Saxo board via a ribbon cable. I've added jumpers to provide two fully balanced inputs for future use as well as a header to connect to these. This is a preliminary circuit until we decide which A/D converter we will use.
Next we are going to test the various A/D's, in particular at 192kHz. The options are the Wolfson WM8785, TI PCM4202 and Cypress CS5381. If there is a clear techical leader then that will be the one we use in the final design, if not then we will select based on availability and price.
Next I'm going to look at generating the I/Q and side tone for CW within the FPGA. This will eliminate the latency associated with processing CW in PowerSDR.
There is still plenty of hardware and software to be done so feel free to jump in if you are interested!
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