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Re: [Xylo-SDR] Your FPGA Code

----- Original Message ----- From: "KD5NWA" <kd5nwa@cox.net>
To: "Xylo-SDR Discussion" <xylo-sdr@lists.ae5k.us>
Sent: Monday, December 12, 2005 12:06 PM
Subject: Re: [Xylo-SDR] Your FPGA Code

Leon, are you putting the op-amp circuit in the analog input to
create a virtual ground and eliminate ground loop currents and
voltages? That is the downfall of a lot of sound cards and causes the
big hump of trash in the center of the passband. It would need to be
adapted to the input stage to subtract the PC ground level from the signal.

The last stage.

< http://www.nitehawk.com/sm5bsz/linuxdsp/rxiq/antiali.htm >

That's a long way off for me. I need to get the FPGA module designed and working first. 8-)

73, Leon
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