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Re: [Xylo-SDR] Janus board connectors
Hi Helmut,
At the moment the FPGA code switches between the Rx channel Wolfson A/D to the
TLV320 whenever the PTT/MOX or VOX is activated. The Rx audio comes back over
the DAC in the TLV so you can either hear the received signal or
sidetone/monitor.
On transmit we use a PWM oversampling single bit D/A converter to provide the
I/Q signals (a whole 5 lines of Verilog code!)
Assuming enough USB support in the PC (i.e. speed) there is no reason why we
could not make this full duplex for satellite operation. We would just need to
send both the Rx A/D from the Wolfson and the mic audio from the TLV320 over
the USB. We would also need some SDR hardware that supports it (two SDR1000's
or an SDR1000 and a SoftRock perhaps) :).
Thanks for the suggestion.
73's Phil...VK6APH
Quoting vk4str <vk4str@netspace.net.au>:
> Hi Phil,
> Good work and progress on your project, congrats for that.
>
> You are saying that the board is providing full duplex operation. When I
> looked at the Wolfson and TI chip combo some time ago I could not see
> how a "standalone" full duplex operation would be possible. By that I
> mean like what would be required for full duplex satellite transponder
> operation without an additional PC with soundcard and speakers.
>
> RX channel - ADC to PC (Wolfson ADC)
> TX channel - PC to DAC (TLV320AIC23B) === OR ===
> Headphone output - PC to to DAC (TLV320AIC23B)
> Microphone input - ADC (TLV320AIC23B) to PC
>
> If the headphone output is used for RX audio then the line output cannot
> be used for TX audio at the same time(TLV320AIC23B). That means RX audio
> has to go to PC soundcard speakers.
>
> The PWM IQ TX audio may not be useful for any generic applications and
> will probably depend on specific support. What interface will be
> provided for that?
>
> No criticism here, just something to reconsider if the solution is
> optimal. Keep up the good work guys,
>
> Best 73, Helmut
>
>
> Phil Harman wrote:
> > [Background - the Janus board is a high performance A/D and D/A converter
> > that connects to the PC via USB. It will provide full duplex operation at
>
> > up to 192k samples per second at 24 bits. The hardware is based on an FX2
>
> > USB interface feeding an FPGA and high performance A/D and D/A converters.
>
> > The FPGA will also be used in conjunction with a GPS 1pps clock, or
> > stabilized oscillator, to enable any frequency error and drift of the
> 200MHz
> > DDS clock to be corrected within the PowerSDR software. The hardware and
> > software for the project is being developed by Bill KD5TFD and Phil VK6APH
>
> > and will be open source.]
> >
> >
> >
> > We have now successfully tested the TLV320AIC23B as a microphone amplifier
>
> > and Audio out/Headphone amplifier for the Janus USB high speed A/D and
> > D/A board.
> >
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