Re: [Xylo-SDR] Fundamental Atlas design decisions

["Ray Anderson" <ray.anderson@xilinx.com>]

-----Original Message-----
From: Lyle Johnson [mailto:kk7p@wavecable.com] 
Sent: Wednesday, February 22, 2006 9:49 AM
To: Xylo-SDR Discussion
Cc: ray.anderson
Subject: Re: [Xylo-SDR] Fundamental Atlas design decisions

> 	Question:
> 
> 	If the DSP board proposed by Lyle were to be used is it
> envisioned 	that it would be sitting on the LVDS buss? If so would
> it be listen 	only or would it drive the buss at times ??

Depends entirely on what the I/O requirements are for the other boards. 
  The DSP board needs to communicate with the audio I/O and "IF I/O" 
boards, but only at DSP sampling rates of 200kHz or so.  These are 
typically serial interfaces like I2S, so the data rate is on the order 
of 9 MHz or less.  It will also likely need to configure/update various 
peripheral boards (command the DDS/Synthesizer(s), set gains, etc) but 
this is likely to be done using I2C or SPI style interfaces.

Hopefully, LVDS won't be required for any of this.

73,

Lyle KK7P


	Lyle-

	Thanks, that answers my question. I was just concerned that some
mechanism such as dual-port memory sharing with the FPGA or other high
speed buss oriented communications might be present.

	Having the communications between the DSP processor and DDS, and
A/D and D/A over 'low-speed' serial channels certainly sounds like the
way to go. Thanks for the clarification. I'm just trying to visualize
what the requirements of the Atlas backplane will be.


-Ray	WB6TPU